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Nios II / Sopc builder / Computer memory / Nios embedded processor / Field-programmable gate array / Synchronous dynamic random-access memory / Joint Test Action Group / Dynamic random-access memory / National Institute of Open Schooling / Education / Electronics / Electronic engineering


Microsoft Word - DKAN0011A.doc
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Document Date: 2011-01-11 11:24:04

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File Size: 3,82 MB

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Company

Terasic Technologies Inc. / Chip Memory Setup Digi-Key Corporation / LCD Controller Setup Digi-Key Corporation / PIO Pushbutton Setup Digi-Key Corporation / PIO Switch Setup Digi-Key Corporation / JTAG UART Setup Digi-Key Corporation / Nios II Processor Setup Digi-Key Corporation / Altera / Digi-Key Corporation / /

Facility

Component Library / /

IndustryTerm

target device / application software development / /

Position

USB-Blaster driver / /

Product

Programmable-Chip / DE2 Altera / Quartus II software / Quartus II / /

ProgrammingLanguage

C / Verilog / /

Technology

FPGA / RAM / SDRAM / Verilog / VHDL / /

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