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Microprocessors
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481	Performance Nonmonotonicities: A Case Study of the UltraSPARC Processor by Nathaniel A. Kushman Submitted to the Department of Electrical Engineering and Computer Science Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:50 Microprocessors UltraSPARC Central processing unit Microarchitecture SPARC Superscalar Computer Sun Ultra series UltraSPARC T1 Computer hardware Computer architecture Electronic engineering
482	© Andrey Prokhorov - istockphoto.com F R A U N H O F E R - I N S T I T U T F Ü R A r b eits w irts c haft un d O r g anisation iao MWare – Software Technologies for Add to Reading List Source URL: www.iao.fraunhofer.de Language: English - Date: 2012-10-16 08:19:52 Fraunhofer Society Laboratories Multi-core processor Multicore Electronics Science Computing Parallel computing Microprocessors
483	Portable High-Performance Programs by Matteo Frigo Laurea, Universit`a di Padova[removed]Dottorato di Ricerca, Universit`a di Padova (1996) Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:49 Cilk Charles E. Leiserson Computer architecture Microprocessors Digital signal processing Cache-oblivious algorithm Parallel computing Thread Microarchitecture Computing Cache Central processing unit
484	code::dive code::dive conference 5th of November 2014 Add to Reading List Source URL: araw.pl Language: English - Date: 2014-09-02 12:10:01 Central processing unit Threads Microprocessors Parallel computing Computer memory CPU cache Multithreading Computing Computer hardware Computer architecture
485	Cilk: An Efficient Multithreaded Runtime System ROBERT D. B LUMOFE , C HRISTOPHER F. J OERG , B RADLEY C. K USZMAUL , C HARLES E. L EISERSON , K EITH H. R ANDALL , AND Y ULI Z HOU MIT Laboratory for Computer Science, 54 Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:49 Cilk Parallel computing Threads Microprocessors Multithreading Scheduling C SIGPLAN Intel Cilk Plus Computing Concurrent computing Computer programming
486	Scheduling Multithreaded Computations by Work Stealing Robert D. Blumofe The University of Texas at Austin Charles E. Leiserson MIT Laboratory for Computer Science Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:51 Threads Computer architecture Parallel computing Central processing unit Microprocessors Cilk Scheduling Double-ended queue Process Computing Concurrent computing Computer programming
487	Adaptive Work Stealing with Parallelism Feedback Kunal Agrawal Yuxiong He ∗ Charles E. Leiserson Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:48 Scheduling algorithms Microprocessors Parallel computing Threads Cilk Scheduling Multithreading Process management Computing Concurrent computing Computer architecture
488	Imagine Your Future... Graduate recruitment[removed] Welcome I chose Imagination because I wanted to Add to Reading List Source URL: www.imgtec.com Language: English - Date: 2014-10-16 05:48:06 Fabless semiconductor companies Microprocessors Imagination Technologies Semiconductor companies PowerVR MIPS architecture Multi-core processor ATI Technologies Intel Computer hardware Electronic engineering Computing
489	A Minicourse on Multithreaded Programming Charles E. Leiserson Harald Prokop MIT Laboratory for Computer Science 545 Technology Square Add to Reading List Source URL: supertech.csail.mit.edu Language: English - Date: 2014-09-16 08:27:50 Parallel computing Theoretical computer science Cilk Microprocessors Operations research Threads Algorithm Charles E. Leiserson Scheduling Computing Concurrent computing Computer programming
490	Introduction Machine Memory octrng(4) Add to Reading List Source URL: www.openbsd.org Language: English - Date: 2014-09-30 15:11:24 OpenBSD Instruction set architectures Loongson Microprocessors Supercomputing in China Zhongguancun MIPS architecture Hackathon Dmesg Computing Computer architecture Computer hardware

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