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51	ESCAPE : Environment for the Simulation of Computer Architectures for the Purpose of Education Jan Van Campenhout Peter Verplaetse ∗ Henk Neefs Department of Electronics and Information Systems Add to Reading List Source URL: www.ncsu.edu Language: English - Date: 2003-06-06 00:00:12 Central processing unit Parallel computing Classes of computers Firmware Microcode Microarchitecture Branch predictor Delay slot Software pipelining Computer architecture Computing Computer engineering
52	Microsoft Word - cscc.doc Add to Reading List Source URL: www.wseas.us Language: English - Date: 2006-09-30 05:26:05 Central processing unit Classes of computers Compiler optimizations Instruction set architectures Microcode Delay slot Microarchitecture Strength reduction DLX Computer architecture Computing Computer engineering
53	A Novel ASIC Design Approach Based on a New Machine Paradigm R. W. Hartenstein, A. G. Hirschbiel, M. Riedmüller, K. Schmidt, M. Weber Universitaet Kaiserslautern, F.B. Informatik, Bau 12, Postfach 3049, D[removed]Kaisers Add to Reading List Source URL: xputer.de Language: English - Date: 2013-11-13 03:37:58 Central processing unit Classes of computers Firmware Microcode Computer Programming paradigm Parallel computing Instruction set Von Neumann architecture Computing Computer architecture Electronics
54	R.W. Hartenstein, A.G. Hirschbiel, M. Riedmuller, K. Schmidt, M.Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24, Hawaii Int. Conference on System Sciences, Koloa Hawaii, 1991 A Add to Reading List Source URL: hartenstein.de Language: English - Date: 2012-03-09 12:37:00 Computer hardware Parallel computing Cache Systolic array Instruction set Microcode Computer Computer architecture Central processing unit Computing
55	R.W. Hartenstein, A.G. Hirschbiel, M. Riedmuller, K. Schmidt, M.Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24, Hawaii Int. Conference on System Sciences, Koloa Hawaii, 1991 A Add to Reading List Source URL: xputer.de Language: English - Date: 2012-03-17 07:18:56 Computer hardware Parallel computing Cache Systolic array Instruction set Microcode Computer Computer architecture Central processing unit Computing
56	R. W. Hartenstein, K. Schmidt, H. Reinig, M. Weber: A Novel Compilation Technique for a Machine Paradigm Based on Field-Programmable Logic; in Will Moore, Wayne Luk (ed.): FPGAs; Oxford 1991 International Workshop on Fie Add to Reading List Source URL: xputer.de Language: English - Date: 2012-03-17 07:08:04 Central processing unit Classes of computers Microprocessors Computer Computing Microcode Field-programmable gate array Programming paradigm Von Neumann architecture Computer architecture Computer hardware Electronic engineering
57	R.W. Hartenstein, A.G. Hirschbiel, M. Riedmuller, K. Schmidt, M.Weber: A High Performance Machine Paradigm Based on Auto-Sequencing Data Memory; HICSS-24, Hawaii Int. Conference on System Sciences, Koloa Hawaii, 1991 A Add to Reading List Source URL: hartenstein.de Language: English - Date: 2012-03-09 12:41:54 Computer hardware Parallel computing Cache Systolic array Instruction set Microcode Computer Computer architecture Central processing unit Computing
58	A Reconfigurable Multiprocessor Architecture... Page 1 A Reconfigurable Multiprocessor Architecture and its Arithmetic Performance Add to Reading List Source URL: kwiniec.0catch.com Language: English - Date: 2001-12-16 00:05:46 Computer hardware Parallel computing Classes of computers Microcode Instruction set SIMD Floating point Computer architecture Computing Central processing unit
59	Version 1, November[removed]L3X2 Systems architectures for the LEO III computer. LEO III is a microprogrammed, transistorised, computer with a parallel arithmetic unit. The Add to Reading List Source URL: www.ourcomputerheritage.org Language: English - Date: 2012-01-22 14:41:47 Central processing unit Firmware Microcode Instruction set architectures Minicomputers UNIVAC LARC Computer architecture Classes of computers Computer hardware
60	_micro. JAN[removed]TECHNICAL MANUAL • Add to Reading List Source URL: kicksfortso.com Language: English - Date: 2012-12-04 12:24:59 Central processing unit Firmware Digital electronics Microcode Microprocessor Computer hardware Computer architecture Electronic engineering