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Dynamically Matching ILP Characteristics Via a Heterogeneous Clustered Microarchitecture Lei Chen, David H. Albonesi, Steven Dropsho† Department of Electrical and Computer Engineering †Department of Computer Science
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Document Date: 2005-02-14 13:33:16


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File Size: 107,83 KB

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Austin / /

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3M / IDC / High Performance Computing Systems / /

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Computer Science University of Rochester Rochester / Canal et al. / Use Narrow Pipeline Use Wide Pipeline / pipeline Fetch / R. Canal / Use Narrow Pipeline Use Wide Pipeline Use Narrow Pipeline Use Wide Pipeline / pipeline Wide / pipeline Figure / Store Queue / University of Wisconsin / /

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benchmark applications / heterogeneous processor / static instruction scheduling algorithm / monolithic 8way superscalar processor / superscalar processor / 2K integer applications / conventional superscalar processor / work explores reducing energy / given / lowest energy / /

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IPC / /

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Computer Science University of Rochester Rochester / Steven Dropsho† Department of Electrical and Computer Engineering / ADD IDC / University of Wisconsin / Madison / /

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Lei Chen / Steven Dropsho / David H. Albonesi / /

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Franklin / /

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Wisconsin / New York / /

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Core / /

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Alpha / static instruction scheduling algorithm / adpcm / load balancing / jpeg / monolithic 8way superscalar processor / Superscalar Processors / conventional superscalar processor / GSM / simulation / superscalar processor / /

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