Partial-Coherence Abstractions for Relaxed Memory Models Michael Kuperstein Martin Vechev Eran Yahav ∗

Source URL: practicalsynthesis.github.io

A Memory Coherence Technique for Online Transient Error Recovery of FPGA Configurations Wei-Je Huang and Edward J. McCluskey CENTER FOR RELIABLE COMPUTING Computer Systems Laboratory, Department of Electrical Engineering

Source URL: crc.stanford.edu

Partial-Coherence Abstractions for Relaxed Memory Models Michael Kuperstein Martin Vechev Eran Yahav ∗

Source URL: www.sri.inf.ethz.ch

Distributed STMs   STMs are being employed in new scenarios:   Database caches in three-tier web apps (FénixEDU)   HPC programming language (X10)   In-memory cloud data grids (Coherence, Infinispan)

Source URL: www.gsd.inesc-id.pt

DPHPC Overview Design of Parallel and High-Performance Computing Fall 2013 Lecture: Cache Coherence & Memory Models

Source URL: spcl.inf.ethz.ch

Memory Coherence in Shared Virtual Memory Systems 1 Kai Li and Paul Hudak Department of Computer Science Yale University New Haven, CT 06520

Source URL: nil.csail.mit.edu

Memory & Cognition 2007, 35 (6), Coherence-driven resolution of referential ambiguity: A computational model Stefan L. Frank

Source URL: www.stefanfrank.info

spcl.inf.ethz.ch @spcl_eth TIMO SCHNEIDER <> DPHPC Recitation Session 4

Source URL: spcl.inf.ethz.ch

• Computing
• Cache coherency
• Computer programming
• Parallel computing
• Computer memory
• Cache coherence
• Concurrent computing
• OpenMP
• False sharing
• Cache
• CPU cache

A Locality Model for the Real-Time Specification for Java Abdul Haseeb Malik Andy Wellings Yang Chang

Source URL: d3s.mff.cuni.cz

• Computing
• Concurrent computing
• Parallel computing
• Computer memory
• Classes of computers
• Central processing unit
• Non-uniform memory access
• Cache coherence
• Multiprocessing
• Uniform memory access
• Thread
• Cache memory

¨ FUR ¨ INFORMATIK FAKULTAT ¨ MUNCHEN ¨ DER TECHNISCHEN UNIVERSITAT

Source URL: www5.in.tum.de

• Concurrent computing
• Computing
• Parallel computing
• Distributed shared memory
• Shared memory
• Distributed memory
• Memory architecture
• Multiprocessing
• Synchronization
• Cache coherence
• Cache
• Symmetric multiprocessing