On A Generic Parallel Collection Framework Aleksandar Prokopec, Phil Bagwell, Tiark Rompf, Martin Odersky June 27, 2011 Abstract

Source URL: axel22.github.io

• Parallel computing
• Scala
• Thread pool
• MapReduce
• Work stealing
• Foreach loop
• Scheduling
• Double-ended queue
• Queue
• Iterator
• Task
• Multi-core processor

A multi-component closed-loop control framework for rail traffic networks Raimond Wüst, IDP, ZHAW Albert Steiner, IDP, ZHAW

Source URL: www.strc.ch

• Clock-face scheduling
• Transportation planning

Throughput-Constrained Voltage and Frequency Scaling for Real-time Heterogeneous Multiprocessors Pengcheng Huang Orlando Moreira

Source URL: www.tik.ethz.ch

• Operations research
• Engineering
• Electronic engineering
• Electrical engineering
• Parallel computing
• Mathematical optimization
• Algorithm
• Throughput
• Phase-locked loop
• Scheduling
• Unfolding
• Integer programming

Lecture: Pipeline Wrap-Up and Static ILP • Topics: multi-cycle instructions, precise exceptions, deep pipelines, compiler scheduling, loop unrolling, software pipelining (Sections C.5, 3.2) • Turn in HW2; HW3 will b

Source URL: www.eng.utah.edu

Scheduling Loop-free Network Updates: It’s Good to Relax! Arne Ludwig1 , Jan Marcinkowski2 , Stefan Schmid1,3 2

Source URL: www.net.t-labs.tu-berlin.de

The polyhedral model Scheduling, SURES, and approximated loops Data mapping & communication optimizations Approximations in the polyhedral model Alain Darte

Source URL: perso.ens-lyon.fr

• Loop optimization
• Polytope model
• Automatic parallelization
• Fortran
• Aliasing
• Compiler
• Data-flow analysis
• GNU Compiler Collection
• Mathematical optimization
• Computing
• Software
• Compiler optimizations

The Performance Evaluation of Omni OpenMP Compiler Kazuhiro Kusano Shigehisa Satoh Mitsuhisa Sato Real World Computing Partnership

Source URL: research.ac.upc.edu

• Software engineering
• OpenMP
• Directive
• Unified Parallel C
• Loop scheduling
• POSIX Threads
• Compiler
• Fortran
• OpenACC
• Computing
• Computer programming
• Parallel computing

Software Tools for Technology Transfer manuscript No. (will be inserted by the editor) A Loop Acceleration Technique to Speed Up Verification of Automatically-Generated Plans Robert P. Goldman and Michael J.S. Pelican an

Source URL: rpgoldman.goldman-tribe.org

• Applied mathematics
• Computer science
• Model checking
• Formal verification
• Finite-state machine
• Deterministic finite automaton
• Automated planning and scheduling
• Uppaal Model Checker
• Clock
• Models of computation
• Automata theory
• Theoretical computer science