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INESC-ID
Results: 423

#	Item
211	Method for designing Multi-Channel RNS Architectures to prevent Power Analysis SCA Hector Pettenghi† , Jude Angelo Ambrose‡ , Ricardo Chaves† , and Leonel Sousa† † INESC-ID, IST Universidade de Lisboa Lisboa, P Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2015-01-05 18:10:14 2N Residue number system Factorial Rectangular function
212	A semantic web faceted search system for facilitating building of biodiversity and ecosystems services Marie-Angélique Laporte, Isabelle Mougenot, Eric Garnier, Ulrike Stahl, Lutz Maicher and Jens Kattge Add to Reading List Source URL: dils2014.inesc-id.pt Language: English - Date: 2016-07-28 13:22:06 Semantic Web Knowledge representation Simple Knowledge Organization System RDF Schema Seed Web resource Resource Description Framework Root
213	Chapter 22 BIOINSPIRED STIMULUS ENCODER FOR CORTICAL VISUAL NEUROPROSTHESES Leonel Sousa, Pedro Tom´as Department of Electrical and Computer Engineering, IST/INESC-ID, Portugal , Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2005-09-07 15:00:16 Filter theory Linear filters Digital signal processing Signal processing Emerging technologies Neuroprosthetics Retina Electronic filter Filter Digital filter Infinite impulse response High-pass filter
214	OPENCL PARALLELIZATION OF THE HEVC DE-QUANTIZATION AND INVERSE TRANSFORM FOR HETEROGENEOUS PLATFORMS Diego F. de Souza, Nuno Roma, Leonel Sousa INESC-ID, IST, Universidade de Lisboa Rua Alves Redol 9, Lisboa, Po Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2015-02-23 03:59:56 Videotelephony GPGPU ISO standards High-definition television Video compression High Efficiency Video Coding Graphics processing unit OpenCL H.264/MPEG-4 AVC Video codec Compute kernel Mali
215	doicomjnl/bxr119 Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2011-12-03 09:51:22 Modular arithmetic Computer arithmetic Finite fields Binary operations Multiplication Residue number system Elliptic curve point multiplication Multiplication algorithm General-purpose computing on graphics processing units Montgomery modular multiplication XTR Division algorithm
216	GPU Acceleration of the HEVC Decoder Inter Prediction Module Diego F. de Souza, Aleksandar Ilic, Nuno Roma and Leonel Sousa INESC-ID, IST, Universidade de Lisboa Rua Alves Redol 9, , Lisbon, Portugal Email: {dieg Add to Reading List Source URL: www.inesc-id.pt Language: English - Date: 2016-03-10 05:49:53 Video compression ISO standards MPEG High-definition television Videotelephony High Efficiency Video Coding Motion compensation Coding tree unit H.264/MPEG-4 AVC Inter frame Deblocking filter Graphics processing unit
217	Euro-TM Workshop on Transactional Memory Bern, Switzerland, April 10, 2012 Differentiated Access to Virtual Resources in Cloud Environments Add to Reading List Source URL: www.gsd.inesc-id.pt Language: English - Date: 2012-04-18 12:46:07 Cloud infrastructure Cloud computing Service-level agreement Cloudkick
218	Universidade de Lisboa Curriculum Vitae of Professor (First two pages resume) Add to Reading List Source URL: sips.inesc-id.pt Language: English - Date: 2016-07-08 17:14:40 Institute of Electrical and Electronics Engineers Piscataway New Jersey
219	technology from seed What is so special in the Tomasulo Hardware Algorithm? Leonel Sousa Add to Reading List Source URL: sips.inesc-id.pt Language: English - Date: 2008-12-13 04:53:16 Robert Tomasulo University of Trs-os-Montes and Alto Douro Taguspark Tomasulo algorithm Parallel computing IBM System/360 Model 91 Algorithm INESC-ID
220	Contributos para o Aumento de Qualidade na Língua Digital Anabela Barreiro INESC-ID Add to Reading List Source URL: www.inesc-id.pt Language: Portuguese - Date: 2016-04-05 17:50:44

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