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| First Page | Document Content | |
|---|---|---|
 Date: 2009-04-29 02:56:44X86 architecture Xeon Intel Core Itanium Nehalem Hyper-threading Intel X86 virtualization Multi-core processor Computer architecture Computing Computer hardware |
| Power-aware Computing: Measurement, Control, and Performance Analysis for Intel Xeon Phi Azzam Haidar∗ , Heike Jagode∗ , Asim YarKhan∗ , Phil Vaccaro∗ , Stanimire Tomov∗ , Jack Dongarra∗†‡ {haidar|jagode|DocID: 1vr39 - View Document |
| Performance and Tuning Considerations for SAS on the Intel Xeon E5 v4 Series Processors and the Vexata VX-100F Storage SystemDocID: 1v2yr - View Document |
| iWARP Support in Scalable Xeon PlatformDocID: 1v0fP - View Document |
| Cotización PLAN XEON E3-2 PERIODO Valor Neto Mensual IVA (19%)DocID: 1uVmN - View Document |
| AMBER: The How, What and Why on an Intel® Xeon Phi™ Perri Needham & Ross Walker (SDSC / UCSD)DocID: 1uONM - View Document |