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Control register / Interrupt descriptor table / Task state segment / CPUID / Global Descriptor Table / Protected mode / Processor register / 64-bit / Context switch / Computer architecture / X86 architecture / X86
Date: 2013-05-08 17:06:40
Control register
Interrupt descriptor table
Task state segment
CPUID
Global Descriptor Table
Protected mode
Processor register
64-bit
Context switch
Computer architecture
X86 architecture
X86

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