Error floor

Results: 31



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1GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection G. Falcao, J. Andrade, V. Silva and L. Sousa A new strategy is proposed for implementing computationally intensive high-throughput decoder

GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection G. Falcao, J. Andrade, V. Silva and L. Sousa A new strategy is proposed for implementing computationally intensive high-throughput decoder

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Source URL: www.inesc-id.pt

Language: English - Date: 2011-05-15 06:58:54
    2NOLTA, IEICE Paper Verified sharp bounds for the real gamma function over the entire floating-point range

    NOLTA, IEICE Paper Verified sharp bounds for the real gamma function over the entire floating-point range

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    Source URL: www.ti3.tu-harburg.de

    Language: English - Date: 2014-04-24 05:11:30
    3Intersected low-density parity-check and convolutional codes Edward A. Ratzer Cavendish Laboratory, University of Cambridge Madingley Road, Cambridge CB3 0HE  Abstract

    Intersected low-density parity-check and convolutional codes Edward A. Ratzer Cavendish Laboratory, University of Cambridge Madingley Road, Cambridge CB3 0HE Abstract

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    Source URL: www.inference.phy.cam.ac.uk

    Language: English - Date: 2003-05-20 11:15:46
    4Marker codes for channels with insertions and deletions Edward A. Ratzer Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE, UK Phone: +337238, Fax: +E-mail: e

    Marker codes for channels with insertions and deletions Edward A. Ratzer Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge CB3 0HE, UK Phone: +337238, Fax: +E-mail: e

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    Source URL: www.inference.phy.cam.ac.uk

    Language: English - Date: 2003-06-05 10:44:11
    5Verifying Relative Error Bounds using Symbolic Simulation Jesse Bingham and Joe Leslie-Hurd Intel Corporation, Hillsboro, U.S.A

    Verifying Relative Error Bounds using Symbolic Simulation Jesse Bingham and Joe Leslie-Hurd Intel Corporation, Hillsboro, U.S.A

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    Source URL: www.gilith.com

    Language: English - Date: 2014-07-24 18:40:33
    6

    PDF Document

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    Source URL: www.cl.cam.ac.uk

    Language: English - Date: 2008-05-09 05:04:36
    7

    PDF Document

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    Source URL: www.cl.cam.ac.uk

    Language: English - Date: 2007-06-29 06:52:43
    8Symposium: Real-time Digital Signal Processing for Optical Transceivers  FPGA based Prototyping of Next Generation Forward Error Correction T. Mizuochi, Y. Konishi, Y. Miyata, T. Inoue, K. Onohara , S. Kametani, T. Sugih

    Symposium: Real-time Digital Signal Processing for Optical Transceivers FPGA based Prototyping of Next Generation Forward Error Correction T. Mizuochi, Y. Konishi, Y. Miyata, T. Inoue, K. Onohara , S. Kametani, T. Sugih

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    Source URL: conference.vde.com

    Language: English - Date: 2009-11-04 12:20:48
    9MITSUBISHI ELECTRIC RESEARCH LABORATORIES http://www.merl.com Hierarchical and High-Girth QC LDPC Codes

    MITSUBISHI ELECTRIC RESEARCH LABORATORIES http://www.merl.com Hierarchical and High-Girth QC LDPC Codes

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    Source URL: www.merl.com

    Language: English - Date: 2013-07-01 15:29:07
    10LDPC Codes – a brief Tutorial Bernhard M.J. Leiner, Stud.ID.: 53418L  April 8,

    LDPC Codes – a brief Tutorial Bernhard M.J. Leiner, Stud.ID.: 53418L April 8,

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    Source URL: www.bernh.net

    Language: English - Date: 2014-05-29 16:27:32