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#	Item
81	A to Z of C :: 17. Processor Add to Reading List Source URL: guideme.itgo.com Language: English - Date: 2005-01-14 05:37:41 Programming language implementation Assembly languages CPUID Machine code FLAGS register MOV X86 assembly language Protected mode Intel Computer architecture X86 architecture X86 instructions
82	Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3B: Add to Reading List Source URL: www.intel.com Language: English - Date: 2011-05-18 06:34:24 X86 architecture Central processing unit Virtual machines Programming language implementation Control register CPUID X86 virtualization X86-64 64-bit Computer architecture System software Computing
83	Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3C: Add to Reading List Source URL: download.intel.com Language: English - Date: 2013-06-03 10:44:09 X86 architecture Central processing unit Virtual machines Instruction set architectures Programming language implementation Control register CPUID X86 virtualization X86-64 Computer architecture System software Computing
84	AMD64 Architecture Programmer’s Manual, Volume 2: System Programming Add to Reading List Source URL: developer.amd.com Language: English - Date: 2013-10-24 18:24:55 Control register Interrupt descriptor table Task state segment CPUID Global Descriptor Table Protected mode Processor register 64-bit Context switch Computer architecture X86 architecture X86
85	AMD64 Architecture Programmer’s Manual, Volume 2: System Programming Add to Reading List Source URL: support.amd.com Language: English - Date: 2013-11-01 16:14:30 X86 Interrupt descriptor table Task state segment Global Descriptor Table Protected mode CPUID Processor register Context switch INT Computer architecture X86 architecture Control register
86	AMD64 Technology AMD64 Architecture Programmer’s Manual Add to Reading List Source URL: support.amd.com Language: English - Date: 2013-11-01 16:25:12 X86 instructions Central processing unit CPUID X86-64 Instruction set 64-bit X87 MOV Opcode Computer architecture X86 architecture Machine code
87	AMD64 Architecture Programmer’s Manual, Volume 2: System Programming Add to Reading List Source URL: developer.amd.com Language: English - Date: 2013-10-24 18:25:06 Control register Interrupt descriptor table Task state segment CPUID Global Descriptor Table Protected mode Processor register 64-bit Context switch Computer architecture X86 architecture X86
88	AMD64 Technology AMD64 Architecture Programmer’s Manual Add to Reading List Source URL: developer.amd.com Language: English - Date: 2013-10-24 18:19:31 X86 instructions Central processing unit CPUID X86-64 64-bit Instruction set X87 MOV Opcode Computer architecture X86 architecture Machine code
89	Cross-Vendor Migration AMD Operating Systems Research Center Uwe Dannowski Add to Reading List Source URL: developer.amd.com Language: English - Date: 2013-10-24 22:15:23 X86 architecture Virtual machines Programming language implementation CPUID Machine code Hardware virtualization X86-64 Long mode Hyper-V Computer architecture System software Computing
90	MultiProcessor Specification Version 1.4 Add to Reading List Source URL: pdos.csail.mit.edu Language: English - Date: 2007-08-28 06:49:30 MultiProcessor Specification Interrupt request Advanced Programmable Interrupt Controller Interrupt Programmable Interrupt Controller Conventional PCI CPUID X2APIC Intel Computer architecture Interrupts Intel APIC Architecture

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