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Brayton
Results: 169

#	Item
31	Sequential Synthesis with Co-Büchi Specifications Guoqiang Wang, Alan Mishchenko, Robert Brayton, and Alberto Sangiovanni-Vincentelli EECS Dept. University of California Berkeley, California, 94720, USA {geraldw, alanmi Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-10-02 15:04:33 Büchi automaton Muller automaton Ω-automaton Finite-state machine Powerset construction Nondeterministic finite automaton Generalized Büchi automaton Automata theory Theoretical computer science Computer science
32	A Theory of Non-Deterministic Networks Alan Mishchenko and Robert Brayton Department of EECS, UC Berkeley, Berkeley, CA[removed]Phone: [removed]Fax: [removed]. {alanmi, brayton}@eecs.berkeley.edu Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2005-04-30 02:17:35 Science Canonical form Boolean network Artificial neuron Influence diagram Boolean algebra Mathematics Abstraction Logic Algebraic logic Neural networks
33	Efficient Solution of Language Equations Using Partitioned Representations Alan Mishchenko, Robert Brayton, Roland Jiang Tiziano Villa Nina Yevtushenko Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2004-12-03 17:36:01 Computer science Finite-state machine Nondeterministic finite automaton Powerset construction Nested word Automata theory Theoretical computer science Models of computation
34	Improvements to Technology Mapping for LUT-Based FPGAs Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-02-27 22:53:37 Diagrams And-inverter graph Logic synthesis Field-programmable gate array Directed acyclic graph Algorithm Heuristic function Electronic engineering Electronic design automation Electrical engineering
35	Improvements to Technology Mapping for LUT-Based FPGAs Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-10-04 01:10:16 R-tree Static single assignment form Heuristic function Tree traversal Graph theory Tree decomposition Directed acyclic graph
36	Reducing Multi-Valued Algebraic Operations to Binary Jie-Hong R. Jiang Alan Mishchenko Robert K. Brayton Add to Reading List Source URL: www.bvsrc.org Language: Vietnamese - Date: 2002-12-06 20:56:43
37	Fast Minimum-Register Retiming via Binary Maximum-Flow Alan Mishchenko Aaron Hurst Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-11-20 10:30:53 Formal methods Electronics Retiming Electronic design automation Maximum flow problem Flow network Digital electronics Ford–Fulkerson algorithm Logic gate Network flow Electronic engineering Mathematics
38	SAT-Based Complete Don’t-Care Computation for Network Optimization Alan Mishchenko and Robert K. Brayton Department of EECS University of California, Berkeley {alanmi, brayton}@eecs.berkeley.edu Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2004-12-03 17:46:16 Boolean algebra Electronic design automation Formal methods Bioinformatics Boolean network Logic Boolean satisfiability problem Circuit Model checking Theoretical computer science Applied mathematics Mathematics
39	Optimization of Multi-Valued Multi-Level Networks M. Gao, J-H. Jiang, Y. Jiang, Y. Li, A. Mishchenko, S. Sinha, T. Villa, and R. Brayton Electrical Engineering and Computer Sciences Dept. University of California, Ber Add to Reading List Source URL: www.bvsrc.org Language: English* - Date: 2004-06-17 16:08:02 Diagrams Model checking Many-valued logic Flip-flop Electronics Mathematics Mathematical logic Electronic engineering Binary decision diagram Boolean algebra
40	Improvements to Combinational Equivalence Checking Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-08-09 21:17:37 Formal methods Logic in computer science NP-complete problems And-inverter graph Diagrams Boolean satisfiability problem Satisfiability Logic synthesis Automatic test pattern generation Electronic engineering Theoretical computer science Electronic design automation

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