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Altera
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211	REGULAMENTO (UE) N.o 1361/•2014 DA COMISSÃO - de 18 de dezembro de[removed]que altera o Regulamento (CE) n.o 1126/•2008, que adota determinadas normas internacionais de contabilidade nos Add to Reading List Source URL: www.cnc.min-financas.pt Language: Portuguese - Date: 2015-01-07 07:55:16
212	REGULAMENTO (UE[removed]DA COMISSÃO - de 17 de dezembro de[removed]que altera o Regulamento (CE) n.o[removed], que adota determinadas normas internacionais de contabilidade nos termos d Add to Reading List Source URL: www.cnc.min-financas.pt Language: Portuguese - Date: 2015-01-13 10:39:05
213	6. Parsec HSDVR_2012.indd Add to Reading List Source URL: www.parsec.co.za Language: English - Date: 2014-05-31 05:36:42 Analog recording Media technology Recording ARCNET Altera High Speed CD and DVD writing speed Information science Terminology Video
214	Orientação do Banco Central Europeu, de 10 de outubro de 2012, que altera a Orientação BCE[removed]relativa a medidas adicionais temporárias respeitantes às operações de refinanciamento do Eurosistema e à elegib Add to Reading List Source URL: www.ecb.europa.eu Language: Portuguese - Date: 2012-10-18 09:13:09
215	REGULAMENTO (UE[removed]DA COMISSÃO - de 17 de dezembro de[removed]que altera o Regulamento (CE) n.o[removed], que adota certas normas internacionais de contabilidade nos termos do Reg Add to Reading List Source URL: www.cnc.min-financas.pt Language: Portuguese - Date: 2015-01-13 10:39:06
216	VF360 Stratix® V FPGA module with DSP and FMC for demanding computation and I/O applications The VF360 is a 3U OpenVPX module that Add to Reading List Source URL: www.parsec.co.za Language: English - Date: 2014-05-31 05:37:34 Field-programmable gate array DDR3 SDRAM VPX Software-defined radio Embedded system Electronics Fabless semiconductor companies Electronic engineering Altera
217	Success Story Synopsys and Altera Altera’s SoC FPGA Virtual Target Enables Early Software Development and High Debug Productivity Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-12-30 07:15:37 Fabless semiconductor companies Hillsboro Oregon Synopsys Field-programmable gate array Altera Simulation Embedded system Prototype Joint Test Action Group Electronic engineering Technology Electronics
218	Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools S. Brown, N. Manjikian, Z. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Z. Zilic, and S. Add to Reading List Source URL: www.eecg.toronto.edu Language: English - Date: 1999-09-21 22:20:51 Hardware description languages Logic design Electronic design Complex programmable logic device Cadence Design Systems Field-programmable gate array Altera Verilog Logic simulation Electronic engineering Digital electronics Electronic design automation
219	PM432 Stratix II GX FPGA PMC Module with four HSSDC2 connectors and 90Mb ZBT RAM The PM432 is a single PMC module that Add to Reading List Source URL: www.parsec.co.za Language: English - Date: 2014-05-31 05:37:17 Altera Computing Field-programmable gate array Conventional PCI Software-defined radio Computer hardware Electronic engineering Computer buses
220	HC17.S7T1 The Nios II Family of Configurable Soft-core Processors.ppt Add to Reading List Source URL: www.hotchips.org Language: English - Date: 2013-07-27 23:47:48 Nios II Nios embedded processor Field-programmable gate array Altera CPU design Joint Test Action Group Reduced instruction set computing Soft microprocessor LatticeMico32 Electronic engineering Electronics Computer hardware

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