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141	Introducing the Blackfin Handy Board Fred G. Martin and Andrew Chanler University of Massachusetts Lowell Computer Science 1 University Avenue Lowell, MAUSA Add to Reading List Source URL: www.cs.hmc.edu Language: English - Date: 2007-04-02 08:09:37 Microcontrollers Blackfin Embedded systems Reconfigurable computing Field-programmable gate array Handy Board Joint Test Action Group Analog Devices Xilinx Electronics Computing Electronic engineering
142	Bluehive — A Field-Programable Custom Computing Machine for Extreme-Scale Real-Time Neural Network Simulation Simon W Moore, Paul J Fox, Steven JT Marsh, A Theodore Markettos and Alan Mujumdar Computer Laboratory Unive Add to Reading List Source URL: www.cl.cam.ac.uk Language: English - Date: 2012-07-31 08:34:10 Electronics Nervous system Science Fabless semiconductor companies Computational statistics Field-programmable gate array Spiking neural network Cellular neural network Xilinx Neural networks Electronic engineering Computational neuroscience
143	Corporate Backgrounder Spring 2015 Synopsys Overview and History Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-05-20 16:43:19 Hillsboro Oregon Synopsys Digital electronics Signoff Logic synthesis High-level synthesis Xilinx Magma Design Automation EDA database Electronic engineering Electronic design automation Electronic design
144	PRESS RELEASE 3D PLUS unveils the first member of the embedded programmable modules family : FUSIO-II BUC, France, September 5th 2014 – 3D PLUS, a global leader for high reliability, high density modules solutions, tod Add to Reading List Source URL: www.3d-plus.com Language: English - Date: 2014-12-12 11:11:53 Electronic engineering Field-programmable gate array PCI Express Embedded system Xilinx Conventional PCI Computer hardware Computer buses Computing
145	Product Obsolete/Under Obsolescence Application Note: Virtex-II Series R XAPP623 (v2.1) February 28, 2005 Add to Reading List Source URL: www.xilinx.com Language: English - Date: 2013-03-04 06:00:45 Technology Decoupling capacitor Equivalent series inductance Electrolytic capacitor Equivalent series resistance Tantalum capacitor Capacitive coupling Capacitance Electrical resonance Capacitors Electromagnetism Electrical engineering
146	This is the author’s version of the work. The definitive work was published in Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), New Dehli, India, October 12-1 Add to Reading List Source URL: www12.informatik.uni-erlangen.de Language: English - Date: 2014-11-24 07:07:57 Fabless semiconductor companies Reconfigurable computing GPGPU Field-programmable gate array Impulse C Xilinx OpenCL High-level synthesis Kernel Electronic engineering Computing Computer architecture
147	BORA Xilinx Zynq XC7Z010/XC7Z020 CPU Module Actual Size Add to Reading List Source URL: www.sarsen.net Language: English - Date: 2014-09-23 11:05:04 Reconfigurable computing Xilinx Field-programmable gate array Joint Test Action Group Tegra Classes of computers Electronic engineering Electronics
148	Low Latency Explicit Communica3on and   Synchroniza3on in Scalable Mul3‐core Clusters  C. Kachris, G. Nikiforos, V. Papaefstathiou,   X. Yang, S. Kavadias, M. Katevenis  Add to Reading List Source URL: www.ics.forth.gr Language: English - Date: 2013-12-23 07:16:58 Computer memory MicroBlaze Computing Field-programmable gate array Xilinx Remote direct memory access Electronic engineering Scratchpad memory Computer hardware
149	Compact and Efficient Encryption/Decryption Module for FPGA Implementation of the AES Rijndael Very Well Suited for Small Embedded Applications Ga¨el Rouvroy, Franc¸ois-Xavier Standaert, Jean-Jacques Quisquater and Jea Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-11-14 11:09:55 Block ciphers Reconfigurable computing AES implementations DEAL Field-programmable gate array LEX Xilinx KHAZAD Cryptography Advanced Encryption Standard Data Encryption Standard
150	Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES Ga¨el Rouvroy, Fran¸cois-Xavier Standaert, Jean-Jacques Quisquater, Jean-Didier Legat Add to Reading List Source URL: www.intopix.com Language: English - Date: 2007-11-14 11:08:54 Electronic engineering Field-programmable gate array Advanced Encryption Standard Xilinx Data Encryption Standard Block cipher Lookup table Cryptography Computing Reconfigurable computing

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