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XNOR gate
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1	Proceedings of the International MultiConference of Engineers and Computer Scientists 2012 Vol II, IMECS 2012, March, 2012, Hong Kong A Concurrent Error Detection Based FaultTolerant 32 nm XOR-XNOR Circuit Implem Add to Reading List Source URL: www.bpti.lt Language: English - Date: 2013-12-16 08:28:43 Logic gates Digital electronics Electronic design XOR gate XNOR gate Stuck-at fault Fault model Transistor fault OR gate Fault tolerance Pass transistor logic Exclusive or
2	Less is more when you design with configurable and combination logic By Daniel Jensen, Regional Marketing Manager, NXP Semiconductors Summary If you’d like to squeeze more functionality into less space, while simplifyi Add to Reading List Source URL: www.nxp.com Language: English - Date: 2014-05-09 04:18:53 Negated AND gate XNOR gate NOR gate OR gate Logic family AND gate Series Programmable Array Logic Logic gates Electronic engineering Electronics
3	STATIC COMPONENT INTERCONNECTION TEST TECHNOLOGY IN PRACTICE Frans de Jong, Rob Raaijmakers Philips Research, Philips CFT, The Netherlands Email: [removed], [removed] Steffen Hellmold Add to Reading List Source URL: grouper.ieee.org Language: English - Date: 2001-07-23 12:55:02 Electronics manufacturing Electronic design automation Boundary scan Hardware description languages Joint Test Action Group Design for testing Scan chain Synchronous dynamic random-access memory XNOR gate Electronic engineering Manufacturing Electronics
4	Manuscript to Appear in the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), June 2005, Las Vegas, Nevada. Copyright and all rights therein are retained by au Add to Reading List Source URL: cal.ucf.edu Language: English - Date: 2005-04-26 16:43:41 Electronic design Logic gates Digital electronics Field-programmable gate array XOR gate Redundancy Xilinx XNOR gate Fault detection and isolation Electronic engineering Electronics Fault-tolerant computer systems
5	Secure Two-Party Computation is Practical Benny Pinkas1 , Thomas Schneider2 , Nigel P. Smart3 , and Stephen C. Williams3 1 2 Add to Reading List Source URL: eprint.iacr.org Language: English - Date: 2009-09-02 03:58:11 XOR gate Circuit XNOR gate OR gate Electronic circuit Boolean circuit Exclusive or Verifiable computing Theoretical computer science Logic gates Electronics
6	This Poster provides an overview of IEEE Std[removed]test mode entry and exit methods as well as examples for test logic implementations. IEEE Std 1581 drastically simplifies connectivity test for memory devices poten Add to Reading List Source URL: grouper.ieee.org Language: English - Date: 2011-09-27 22:35:01 Electronics manufacturing Embedded systems Digital electronics Logic gate Boundary scan XNOR gate Microcontroller Joint Test Action Group Electronic engineering Electronics Manufacturing
7	Evolutionary Synthesis of Nand Logic: Dissecting a Digital Organism Add to Reading List Source URL: evoinfo.org Language: English - Date: 2013-04-17 11:51:24 Artificial life Intelligent design Avida XNOR gate Charles Ofria Negated AND gate Digital organism NOP NAND logic Logic gates Computer architecture Computing
8	Logical Effort: Designing for Speed on the Back of an Envelope David Harris Add to Reading List Source URL: www.ece.ucsb.edu Language: English - Date: 2005-11-02 19:22:29 Integrated circuits Logic gates Electronic design Logical effort Logic families CMOS XNOR gate Ring oscillator Inverter Electronic engineering Digital electronics Electronics
9	PDF Document Add to Reading List Source URL: www.xilinx.com Language: English - Date: 2013-05-01 16:02:20 Binary arithmetic Linear feedback shift register Theoretical computer science Cryptography Digital circuits Shift register Maximum length sequence XNOR gate Counter Mathematics Pseudorandom number generators Polynomials