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| First Page | Document Content | |
|---|---|---|
 Date: 2003-03-10 12:32:57Microprocessors Parallel computing Threads Digital electronics Asynchronous circuit Multi-core processor Hyper-threading Central processing unit Field-programmable gate array Computing Electronic engineering Computer architecture |
| ISSN No: International Journal & Magazine of Engineering, Technology, Management and Research A Peer Reviewed Open Access International JournalDocID: 1rfDL - View Document |
| Advanced Logic Design Techniques in Asynchronous Sequential Circuit Synthesis Charles R. Bond http://www.crbond.comDocID: 1qEfm - View Document |
| The design of the control circuit for an asynchronous instruction prefetch unit using signal transition graphs S.-H. Chung and S.B. Furber Department of Computer Science, The University of Manchester, Oxford Road, MancheDocID: 1mtbT - View Document |
| Document Number: Revises: Date: Reply To N3896DocID: 1aQ6b - View Document |
| HKTA 2034 ISSUE 2 FEBRUARY 2003 NETWORK CONNECTION SPECIFICATION FOR CONNECTION OFDocID: 18P9j - View Document |