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| First Page | Document Content | |
|---|---|---|
 Date: 2006-01-16 16:26:40Electronic engineering Soft error Dynamic random-access memory ECC memory 1T-SRAM Memory scrubbing RAM parity Chipkill Error detection and correction Computer memory Computer hardware Electronics |
| LOT-ECC: LOcalized and Tiered Reliability Mechanisms for Commodity Memory Systems ∗ Aniruddha N. Udipi† † Naveen Muralimanohar‡DocID: 11V2b - View Document |
| An Empirical Study of Memory Hardware Errors in A Server Farm∗ Xin Li Michael C. Huang Kai Shen University of RochesterDocID: 10Tf2 - View Document |
| How memory RAS technologies can enhance the uptime of HP ProLiant servers: Reduce server crash rate by approximately 85% - Technical white paperDocID: Zxrq - View Document |
| HC19Fault – Tolerant Design of the IBM POWER6 Microprocessor.v6.pptDocID: W83Y - View Document |