Back to Results
First PageMeta Content
Central processing unit / CPU cache / Cache / Computer memory / Superscalar / R8000 / Instruction set / RHPPC / RISC Single Chip / Computer architecture / Computer hardware / Computing


A RISC Processor for SR8000: Accelerating Large Scale Scientific Computing with SMP Toshihiko Kurihara, Eiki Kamada, Kentaro Shimada, Teruhisa Shimizu Hitachi, Ltd.
Add to Reading List

Document Date: 2013-07-27 22:49:03

Open Document

File Size: 155,04 KB

Share Result on Facebook

Company

Teruhisa Shimizu Hitachi Ltd. / International Business Machines Corporation / Hitachi / /

Facility

Pipeline Stages I-cache Align I-Buf IF1 IF2 IF3 Dec D1 Dispatch D2 Reg. / /

IndustryTerm

large scale scientific applications / code using software pipeline technique element / multi-bank single node / /

Person

Kentaro Shimada / Eiki Kamada / Toshihiko Kurihara / /

Position

Cache Memory Controller / /

Product

PowerPC / /

Technology

Cache Memory / Instruction Processor / System control Processor / RISC Processor / /

SocialTag