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City Orlando / Worcester / C. Paar / Boston / Bochum / Berlin / Security / / Company Computer Sciences / Embedded Computing Systems / Cryptographic Hardware / CRC Press / Embedded Systems / NTL / Christof Paar Communication Security Group / VLSI Signal Processing Systems / Xilinx / / Country Germany / Japan / United States / / / Facility Worcester Polytechnic Institute / NTL library / / IndustryTerm Low-energy digit-serial/parallel finite field multipliers / parallel algorithms / coordinate systems / simplest solution / negligible extra hardware / extra hardware / normalized area-time product / public-key algorithms / software library / implementation technology / area-time product / double-and-add algorithm / computing / optimum solution / security protocols / lowest area-time product / / NaturalFeature Register Allocation Schedulers fall / / Organization Department of Electrical Engineering and Information Sciences / Worcester Polytechnic Institute / Politecnico di Milano / ECE Department / / Person Harley Algorithms / Thomas Wollinger / J. Pelzl / V / Luca Breveglieri Politecnico di Milano / / Position editor / Prime Minister / simple controller / designer / scheduler / controller / / ProgrammingLanguage EC / / ProvinceOrState Massachusetts / / PublishedMedium Cryptology ePrint Archive / IEEE Transactions on Computers / Mathematics of Computation / Lecture Notes in Computer Science / / Technology FPGA / Elliptic Curve Processor / Cantor algorithm / Elliptic Curve Crypto Algorithms / Addition Algorithm / implementation technology / security protocols / SSL / Cryptography / Public Key / finite state machine / public-key algorithms / http / double-and-add algorithm / Improving Harley Algorithms / / URL http / SocialTag 
Finding Optimum Parallel Coprocessor Design for Genus 2 Hyperelliptic Curve Cryptosystems Guido Bertoni and Luca Breveglieri Politecnico di Milano, Italy {bertoni,breveglieri}@elet.polimi.it