| Document Date: 2012-11-12 19:21:46
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City Livermore / / Company NVIDIA / GPU / Lawrence Livermore National Laboratory / / / IndustryTerm cross-device data management / target device / given device / ctsar_device / heterogeneous systems / iterations to devices / energy efficiency / computing / particular device / scientific computing / test applications / / Organization Accelerator-aware Runtimes Thomas R. W. Scogland Wu-chun Feng Barry Rountree Department of Computer Science / Virginia Tech / / Person Barry Rountree / Thomas R. W. Scogland Wu-chun / / Position adaptive scheduler / automatic memory manager / scheduler / Private / programming model / nor does it parallelize serial code / cfo / split scheduler / //scheduler / / Product Accelerated OpenMP / CoreTSAR / CPU / / ProvinceOrState California / / Technology 32 wide SIMD processor / load balancing / API / /
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CoreTSAR: Task Scheduling for Accelerator-aware Runtimes Thomas R. W. Scogland Wu-chun Feng Barry Rountree