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Design / Cryptography / Non-standard positional numeral systems / Mixed radix / Computer arithmetic / Logic synthesis / Logic gate / Advanced Encryption Standard / Digital electronics / Electronic engineering / Electronic design / Electronic design automation


Final report on EPSRC grant “Secure Design Flow” (EP/F016786/1) School of Electrical, Electronic and Computer Engineering, Newcastle University Principal Investigator: Professor Alex Yakovlev Investigators: Dr Alex B
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Document Date: 2011-06-13 08:49:18


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City

Okinawa / Barcelona / /

Company

Renesas Technologies / Synopsys / Company iGXL Ltd / MIPS technologies / RTL / IEEE CS Press / the AES / /

Country

Japan / United States / /

Currency

GBP / /

Event

Company Expansion / /

Facility

Newcastle University / /

IndustryTerm

gate grouping algorithms / clock synthesis tools / mainstream private key algorithms / secure cryptographic algorithms / test chips / technology transfer office / encryption algorithm / mixed radix synthesis tool / energy / /

Organization

ASIC / School of Electrical / Electronic and Computer Engineering / Newcastle University / School of EECE / /

Person

Albert Koelmans / Andrey Mokhov / Alex Yakovlev / Fei Xia / Frank Burns / Julian Murphy / Sophia Antipolis / Alex Bystrov / Alex Yakovlev Investigators / /

Position

Principal Investigator / Professor / /

ProgrammingLanguage

Verilog / /

Technology

encryption / Investigating gate grouping algorithms / FPGA / cryptography / ASIC / mapping algorithm / Verilog / two mainstream private key algorithms / encryption algorithm / secure cryptographic algorithms / test chips / /

URL

http /

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