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Cache / Computer architecture / Central processing unit / Computer engineering / Microprocessors / CPU cache / Microarchitecture / Computer memory / Computer hardware / Computing


SYNERGISTIC CACHING IN SINGLE-CHIP MULTIPROCESSORS a dissertation submitted to the department of electrical engineering and the committee on graduate studies
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Document Date: 2005-12-01 13:38:05


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File Size: 526,53 KB

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Company

Baseline Hardware / /

Facility

University Committee / /

IndustryTerm

on-chip processors / /

Organization

University Committee on Graduate Studies / stanford university / /

Person

William James Dally / Sarah Leilani Harris / Mark A. Horowitz / Christos Kozyrakis Approved / /

Position

Principal Adviser / /

Technology

caching system / systems Chip / on-chip processors / 3.4 Protocols / CACHING / one processor / 8 2.1 Chip / CMP / /

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