Back to Results
First PageMeta Content
MESI protocol / MSI protocol / MOESI protocol / Cache / CPU cache / Logarithm / Cache coherency / Computer hardware / Computing


A Consistency Architecture for Hierarchical Shared Caches Edya Ladan-Mozes and Charles E. Leiserson Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge, MA 02139, USA
Add to Reading List

Document Date: 2014-09-16 08:27:50

Open Document

File Size: 333,78 KB

Share Result on Facebook

City

Munich / /

Company

Artificial Intelligence Laboratory / /

Country

Germany / /

Currency

pence / USD / /

/

Event

FDA Phase / /

Facility

Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge / /

IndustryTerm

given memory bank / binary fat-tree network / consistency protocol / cache-consistency protocol / progressive protocol / bank / memory bank / message-routing network / fat-tree interconnection network / distributed cacheconsistency protocol / memory bank keeps / hierarchical networks / /

OperatingSystem

L3 / /

Organization

Institute of Technology Cambridge / Massachusetts Institute of Technology / Computer Systems Organization / /

Person

Figure / Edya Ladan-Mozes / Charles E. Leiserson / /

Position

IP SP MP / last writer / MP / IP MP / head / Parallel Architectures General / programmer / /

Product

L1cache / P1 / L1 / L1-caches / /

ProgrammingLanguage

C / /

Technology

semiconductor / progressive protocol / MSI protocol / Invariants The HCC protocol / distributed cacheconsistency protocol / cache-consistency protocol / progressive HCC protocol / HCC progressive protocol / HCC protocol / INTRODUCTION Multicore technology / same processor / directory-based protocols / sequential consistency / Shared Memory / HCC consistency protocol / CMP / /

SocialTag