Jitter - PDFSEARCH.IO - Document Search Engine

Jitter
Results: 625

#	Item
71	Microsoft PowerPoint - precise.ppt [Compatibility Mode] Add to Reading List Source URL: www.eecis.udel.edu Language: English - Date: 2008-07-05 15:45:45 Avionics Jitter Synchronization System time Latency Global Positioning System Technology Engineering Electronics
72	DESIGNCON 2011 Technical Papers The Universal PCB Design Grid System Tom Hausherr Receiver Tolerance Testing With Crosstalk Aggressors Arvind Kumar, Martin Miller Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Electronic design automation Jitter Synchronization Signal integrity Phase noise SerDes Field-programmable gate array Electronic engineering Electronics Digital electronics
73	FSF-AD8200A 8-Channel, 185MSPS JESD204B ADC FMC January, Channel, 185MSPS JESD204B ADC FMC The FSF-AD8200A is an 8-channel analog-to-digital conversion board Add to Reading List Source URL: www.fidus.com Language: English Electromagnetism Electronic engineering Analog-to-digital converter JESD204 Jitter Digital-to-analog converter Fidus Spurious-free dynamic range Sampling Digital signal processing Electronic circuits Electronics
74	Paper Title 3D Si Interposer Design and Electrical Performance Study Authors Mandy (Ying) Ji Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Electronic circuits Electronic design automation Jitter Synchronization Signal integrity Printed circuit board Integrated circuit design Phase noise Field-programmable gate array Electronics Electronic engineering Electromagnetism
75	Pattern Generator Module PN L-6001-EPG10-x DESCRIPTION EPG10-x is an Electrical Pattern Generator module that plugs into the XBERT and ParalleX™ Chassis. EPG10-x can generate electrical data from 8.5 Gb/s up to 11.3 Gb Add to Reading List Source URL: www.luceotec.com Language: English - Date: 2010-04-06 06:57:11 Telecommunications engineering Jitter Synchronization Bit error rate Clock signal JESD204 Measurement Data transmission Electronics
76	Conference February 2 - February 5, 2009 Exhibition February 3 - February 4, 2008 Santa Clara, California CD-ROM Technical Paper Proceedings Sponsor www.bertscope.com Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Fabless semiconductor companies Computer memory Semiconductor companies Electronic design automation Rambus Power Architecture Signal integrity Jitter Intel Computer hardware Electronic engineering Electronics
77	Pattern Generator Module PN L-6001-EPG10-6 DESCRIPTION EPG10-6 is an Electrical Pattern Generator module that plugs into the XBERT and ParalleX™ Chassis. EPG10-6 can generate electrical data from 2 Gb/s up to 13 Gb/s, Add to Reading List Source URL: www.luceotec.com Language: English - Date: 2012-01-31 18:36:22 Measurement Jitter Oscilloscope Bit error rate Clock signal Output impedance Universal Serial Bus Digital pattern generator Electronics Electronic test equipment Technology
78	Microsoft Word - OIF-SxI5-01.0.doc Add to Reading List Source URL: www.oiforum.com Language: English - Date: 2004-12-03 15:37:21 Consortia Jitter Optical Internetworking Forum Network protocols SerDes Framer Interface Telecommunications engineering Computing System Packet Interface Fiber-optic communications Synchronization Electronics
79	Technical Papers Electrical Design and Modeling Challenges for 3D System Integration Madhavan Swaminathan Power Grid Parasitic Impact on System Level Power Delivery Thao Pham, Vishram Pandit, Almario F. Delos Angeles Ver Add to Reading List Source URL: www.designcon.com Language: English - Date: 2014-12-22 13:34:10 Telecommunications engineering Jitter Synchronization Electronic design automation Signal integrity Field-programmable gate array SerDes Eye pattern PCI Express Electronic engineering Digital electronics Electronics
80	DeepStorage.net Labs Validation Report latency, packet loss and jitter levels consistent with the types of links medium and large enterprises would use between their primary and secondary data centers. The values for the Add to Reading List Source URL: www.deepstorage.net Language: English - Date: 2013-03-12 14:06:43 OSI protocols Network architecture Network performance Transmission Control Protocol Metro Ethernet TCP tuning ISCSI Low latency Ethernet VMware Computing

UPDATE