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/ Facility Distributed Shared Memory Multiprocessors Maged M. Michael Michael L. Scott Computer Science Department University of Rochester Rochester / / IndustryTerm physical processor / erent processors / base cache coherence protocol / swap algorithms / write-invalidate protocol / load linked/store conditional algorithms / worm-hole mesh network / synthetic applications / directory-based cache coherence protocols / cache coherence protocol / cache coherence protocols / real and synthetic applications / compare and swap in hardware / / Organization National Science Foundation / Distributed Shared Memory Multiprocessors Maged M. Michael Michael L. Scott Computer Science Department University of Rochester Rochester / / Position cache controller / Major / Mips INTerpreter / head / / ProvinceOrState New York / / Technology Alpha / write-invalidate protocol / directory-based protocol / erent processors / snooping cache coherence protocol / cache coherence protocols / base cache coherence protocol / directory-based cache coherence protocols / swap algorithms / same physical processor / snooping cache coherence protocols / MIPS R4000 processor / caching / 64 processors / same processor / simulation / load linked/store conditional algorithms / Shared Memory / cache coherence protocol / / SocialTag