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| First Page | Document Content | |
|---|---|---|
 Date: 2011-03-03 03:50:16Block code Delay insensitive circuit Telecommunications engineering Electronic engineering Computing Hadamard code Reed–Solomon error correction Coding theory Error detection and correction Berger code |
| Microsoft PowerPoint - 21_lines [Read-Only]DocID: 11CXa - View Document |
| Terabit Clockless Crossbar Switch in 130nm Uri Cummings [removed] 1DocID: 10Iqi - View Document |
| TITAC–2: A 32-bit Scalable-Delay-Insensitive Microprocessor Takashi Nanya1) 2) Akihiro Takamura2), Masashi Kuwako1), Masashi Imai1) Taro Fujii2), Motokazu Ozawa2), Izumi Fukasaku2), Yoichiro Ueno2)DocID: 10D5V - View Document |
| 25 YEARS AGO: THE FIRST ASYNCHRONOUS MICROPROCESSOR Alain J. Martin Department of Computer Science California Institute of Technology Pasadena, CA 91125, USADocID: FEkM - View Document |
| INVITED PAPER Asynchronous Techniques for System-on-Chip Design Digital circuit designs that are not sensitive to delay promise to allow operationDocID: w7iK - View Document |