<--- Back to Details
First PageDocument Content
Electronic design automation / Electronic design / Logic in computer science / Algebraic logic / Logic synthesis / Combinational logic / Canonical form / Boolean algebra / Karnaugh map / Electronic engineering / Digital electronics / Design
Date: 2013-09-24 15:54:27
Electronic design automation
Electronic design
Logic in computer science
Algebraic logic
Logic synthesis
Combinational logic
Canonical form
Boolean algebra
Karnaugh map
Electronic engineering
Digital electronics
Design

ECE 102: Digital Circuit Logic

Add to Reading List

Source URL: www.engr.colostate.edu

Download Document from Source Website

File Size: 23,71 KB

Share Document on Facebook

Similar Documents

Temporal logic / Logic in computer science / Model checkers / Linear temporal logic / Computation tree logic / Model checking / PAT / Synthesis / Mathematics

Dissertation Reactive Synthesis: branching logic & parameteri zed systems Ayrat Khalimov Advisor: Roderick Bloem

DocID: 1xVvj - View Document

Synthesis of Logic Interpretations Jian Xiang, John Knight, Kevin Sullivan Department of Computer Science University of Virginia Charlottesville, VA USA {Jian,Knight,Sullivan}@cs.virginia.edu

DocID: 1vpwF - View Document

Reactive Synthesis from Signal Temporal Logic Specifications Vasumathi Raman Alexandre Donzé

DocID: 1uiFq - View Document

Prime Indicants: A Synthesis Method for Indicating Combinational Logic Blocks W. B. Toms, D. A. Edwards School of Computer Science, University of Manchester {tomsw,doug}@cs.man.ac.uk

DocID: 1u5OA - View Document

Switching Logic Synthesis for Reachability∗ Ankur Taly Ashish Tiwari Computer Science Dept., Stanford University

DocID: 1t1e9 - View Document