Binary multiplier

Results: 37



#Item
1Design of a Power Optimal Reversible FIR Filter ASIC Speech Signal Processing Yelle Harika M.Tech, Joginpally B.R.Engineering College.

Design of a Power Optimal Reversible FIR Filter ASIC Speech Signal Processing Yelle Harika M.Tech, Joginpally B.R.Engineering College.

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Source URL: www.ijmetmr.com

Language: English - Date: 2016-08-16 07:16:56
2Performance evaluation of a distributed IMA architecture Emilie Deroche1,2 , Jean-Luc Scharbarg1 , Christian Fraboul1 1 INP-ENSEEIHT IRIT, Universit´ e de Toulouse, Toulouse, France

Performance evaluation of a distributed IMA architecture Emilie Deroche1,2 , Jean-Luc Scharbarg1 , Christian Fraboul1 1 INP-ENSEEIHT IRIT, Universit´ e de Toulouse, Toulouse, France

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Source URL: www.control.lth.se

Language: English - Date: 2015-07-09 03:36:07
3Software implementation of binary elliptic curves: impact of the carry-less multiplier on scalar multiplication J. Taverne0 , A. Faz-Hern´andez1 , D. F. Aranha2 , F. Rodr´ıguez-Henr´ıquez1 , D. Hankerson3 , J. L´op

Software implementation of binary elliptic curves: impact of the carry-less multiplier on scalar multiplication J. Taverne0 , A. Faz-Hern´andez1 , D. F. Aranha2 , F. Rodr´ıguez-Henr´ıquez1 , D. Hankerson3 , J. L´op

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Source URL: delta.cs.cinvestav.mx

Language: English - Date: 2014-08-19 19:28:54
4Instruction for the preparation of final papers for the conference proceedings

Instruction for the preparation of final papers for the conference proceedings

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Source URL: www.bpti.lt

Language: English - Date: 2015-02-22 09:58:24
5journalof Journal of Statistical Planning and InferenceELSEVIER

journalof Journal of Statistical Planning and InferenceELSEVIER

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Source URL: www.ntu.edu.sg

Language: English - Date: 2014-02-28 04:33:22
6A Parallel IEEE P754 Decimal Floating-Point Multiplier Brian Hickmann, Andrew Krioukov, and Michael Schulte University of Wisconsin - Madison Dept. of Electrical and Computer Engineering Madison, WI 53706 {bjhickmann, kr

A Parallel IEEE P754 Decimal Floating-Point Multiplier Brian Hickmann, Andrew Krioukov, and Michael Schulte University of Wisconsin - Madison Dept. of Electrical and Computer Engineering Madison, WI 53706 {bjhickmann, kr

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Source URL: www.cs.berkeley.edu

Language: English - Date: 2009-02-20 21:09:13
7Computer Arithmetic, Part 3

Computer Arithmetic, Part 3

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Source URL: www.saylor.org

Language: English - Date: 2013-03-20 16:13:05
8AVR201: Using the AVR® Hardware Multiplier Features • • • •

AVR201: Using the AVR® Hardware Multiplier Features • • • •

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Source URL: www.atmel.com

Language: English - Date: 2015-03-23 19:52:55
9        Computer Science Principles 

      Computer Science Principles 

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Source URL: code.org

Language: English - Date: 2015-02-20 18:41:27
10Proof of Casteljau method - by Timothée Groleau – First published on 28 May 2002 Introduction The Casteljau method is a method that shows how to split a cubic bezier curve into two

Proof of Casteljau method - by Timothée Groleau – First published on 28 May 2002 Introduction The Casteljau method is a method that shows how to split a cubic bezier curve into two

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Source URL: www.timotheegroleau.com

Language: English - Date: 2004-05-22 23:03:33