AES on the ARM Cortex-M3 and M4 Peter Schwabe and Ko Stoffelen More AES software implementations? •

Source URL: ko.stoffelen.nl

• Computing
• Computer architecture
• Programming language theory
• Instruction set architectures
• Procedural programming languages
• Microcontrollers
• R0
• ALGOL 68
• STM32
• ARM architecture

Fast Ideal Lattice-Based KEMs on ARM Cortex-M4 Matthias J. Kannwischer, Joost Rijneveld, Peter Schwabe September 03, 2018

Source URL: kannwischer.eu

• Mathematics
• Algebra
• Abstract algebra
• Post-quantum cryptography
• Multiplication
• Lattice-based cryptography
• Cryptography
• Karatsuba algorithm
• NTRU
• Lattice
• Polynomial ring
• Field extension

Technical Report UW-CSEPorting Hyperkernel to the ARM Architecture Dylan Johnson University of Washington

Source URL: unsat.cs.washington.edu

• Computer architecture
• Computing
• System software
• Central processing unit
• ARM architecture
• Translation lookaside buffer
• Hypervisor
• Protection ring
• QEMU
• X86 virtualization
• Hyper-V
• Second Level Address Translation

Instruction Scheduling and Register Allocation on ARM Cortex-M Ko Stoffelen Radboud University, Digital Security Group, Nijmegen, The Netherlands

Source URL: ko.stoffelen.nl

• Programming language implementation
• Software
• Computer programming
• Compiler construction
• Compiler optimizations
• Compilers
• Register allocation
• Instruction set architectures
• LLVM
• Optimizing compiler
• Static single assignment form
• GNU Compiler Collection

PDF Document

Source URL: www.arm.gov

PDF Document

Source URL: community.arm.com

PDF Document

Source URL: www.arm.gov

PDF Document

Source URL: www.arm.gov

PDF Document

Source URL: infocenter.arm.com

PDF Document

Source URL: www.arm.gov