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Concurrency control / Computer memory / Central processing unit / MOV / Linearizability / X86 / Instruction set / Barrier / DEC Alpha / Computer architecture / Computing / Instruction set architectures


Efficient code generation for weakly ordered architectures Reinoud Elhorst, Mark Batty, David Chisnall {re302,mjb220,dc552} @ cam.ac.uk Example: message passing
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Document Date: 2014-04-09 10:33:41


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File Size: 654,29 KB

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store C11 / /

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Mark Batty / David Chisnall / /

Position

Programmer / /

ProgrammingLanguage

C++ / /

Technology

Alpha / /

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