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Microkernel / Thread / Kernel / Mach / X86-64 / Cell / Linux kernel / Architecture of Windows NT / 64-bit / Computer architecture / L4 microkernel family / Monolithic kernels


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City

Dresden / /

Company

IBM / /

Currency

USD / /

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Facility

GMD IBM Research University of New South Wales / /

IndustryTerm

pagefault protocol / user-level processor / incompatible processors / system processors / it clear on which processor / subsequent processors / kernel supplier / specific processors / root server / rst processor / /

MarketIndex

IPC / /

Organization

Word ErrNoPrivilege Word ErrInvalidThread Word ErrInvalidSpace Word ErrInvalidScheduler Word ErrUtcbArea Word ErrNoMem Chapter / L4Ka Team / Department of Computer Science / PC SC / Remove association / VIRTUAL REGISTERS Chapter / University of New South Wales / U.S. Securities and Exchange Commission / /

Person

Harvey Tuch / Sydney Technische Universit / Jochen Liedtke / Neal Walfield / Sebastian Sch / Volkmar Uhlig / Alan Au / Set Pager / Philip Derrin / Trent Jaeger / Bryan Ford / Jean Wolter / Andreas Haeberlen / Jochen defined / Ben Leslie / Frank Mehnert / Adam Wiggins / Cristan Szmajda / Kevin Elphinstone / Michael Hohmuth / Marcus V / Marcus Brinkmann / PACE C ONTROL / Marc Salem / Joshua LeVasseur / Uwe Dannowski / /

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ProgrammingLanguage

R / C / C++ / /

ProvinceOrState

New South Wales / /

Region

South Wales / /

Technology

Alpha / Alpha system / 7.1 Thread Start Protocol / specific processors / user-level processor / 7.3 Pagefault Protocol / 7.4 Preemption Protocol / API / C.4 Exception Message Format C.5 Processor / 64-bit processors / 7.6 Sigma0 RPC protocol / 7.5 Exception Protocol / G.6 Exception Message Format G.7 Processor / same processor / virtual memory / system processors / 64-bit processor / 72 74 Protocols / Shared memory / A.8 Exception Message Format A.9 Processor / rst processor / system processor / pagefault protocol / /

URL

http /

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