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Instruction set architectures / 64-bit / Instruction set / Processor register / Microprocessors / X86 architecture / DEC Alpha / UltraSPARC / Computer architecture / Computer hardware / Central processing unit


Document Date: 2011-04-28 15:58:12

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File Size: 2,90 MB

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City

San Jose / /

Company

SPARC International Inc. / SPARC Architecture Manual Version 9 SPARC International Inc. / Tokyo SIMON & SCHUSTER ASIA PTE. LTD. / PRENTICE-HALL HISPANOAMERICANA S.A. / UNIX System Laboratories Inc. / PRENTICE-HALL INTERNATIONAL (UK) LIMITED / MMU Associates / PRENTICE-HALL OF JAPAN INC. / PRENTICE-HALL CANADA INC. / PTR Prentice Hall Prentice-Hall Inc. / PRENTICE-HALL OF AUSTRALIA PTY / F.8 SPARC-V9 Systems / EDITORA PRENTICE-HALL DO BRASIL LTDA. / PRENTICE-HALL OF INDIA PRIVATE LIMITED / /

Country

United States / /

Facility

Tom Germond Editors SAV09R1459912 PT R Prentice Hall / Store Unsigned Byte / Corporate Sales Department PT R Prentice Hall / Store Floating-Point / Store Atomicity / Store Barrier / Store Integer / /

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Movie

D.7 / /

OperatingSystem

UNIX / UNIX System / Microsoft Windows / /

Organization

FAR / CANADA INC / U. S. Government / Integer Unit / National Aeronautics and Space Administration / Trap Table Organization / Floating-Point Unit / /

Person

David L. Weaver / /

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Position

General / /

ProgrammingLanguage

Assembly Language / /

ProvinceOrState

New Jersey / /

Technology

UNIX / 2.3 Processor / Operating Systems / 0.2 Processor / Little-Endian / D.1 Processors / /

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