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Worst-case execution time / Compiler / Static single assignment form / Program optimization / GNU Compiler Collection / Control flow graph / Intermediate language / Code generation / C / Software / Computing / Compiler construction


Document Date: 2011-08-04 08:29:37

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File Size: 1,80 MB

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Company

Intel / Hitachi / WCC / /

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Facility

TU Dortmund University / Pipeline Analysis / /

IndustryTerm

heavy tools / application-specific hardware / real-time software / real-time system / compiler infrastructure / realtime systems / real software resource requirements / memory hierarchy specification infrastructure / lightweight infrastructure / tools / memory hierarchy infrastructure / embedded hard realtime systems / modeled target processor / real-time systems / software development / low-level tools / real-time constraints / /

MarketIndex

aim at reducing / /

OperatingSystem

GNU / Microsoft Vista / /

Organization

US Federal Reserve / Dortmund University / /

Person

Paul Lokuciejewski / Heiko Falk / /

Position

designer / representative / /

Product

TriCore / /

ProgrammingLanguage

ANSI C / C / C++ / /

TVStation

WCET / /

Technology

V850E processor / real-time operating system / TC1797 processors / TriCore processors / ANSI C / C167 processor / API / cloning / SRAM / RTOS / modeled target processor / Infineon TriCore TC1796 processor / /

URL

www.springerlink.com / /

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