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Data / Solid-state drive / TRIM / Flash file system / Flash memory controller / Wear leveling / Forensic science / Flash memory / Data recovery / Computer memory / Computer hardware / Computing


Document Date: 2013-12-27 11:52:33

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Facility

JTAG port / Italy NECST laboratory Introduction Our / /

IndustryTerm

memory chips / flash memory chips / needs custom hardware / /

Organization

Politecnico di Milano / /

Person

Marco Viglione / Gabriele Bonetti / Alessandro Frossi / Federico Maggi / /

Position

reverse engineer / /

Technology

encryption / NAND-based flash memory chips / FPGA / memory chips / flash memory chips / flash / caching / JTAG / mobile devices / /

SocialTag