Virtex

Results: 50



#Item
11From the bitstream to the netlist Jean-Baptiste Note Département d’informatique École Normale Supérieure 45, rue d’Ulm, 75005 Paris

From the bitstream to the netlist Jean-Baptiste Note Département d’informatique École Normale Supérieure 45, rue d’Ulm, 75005 Paris

Add to Reading List

Source URL: www.fabienm.eu

Language: English - Date: 2014-11-17 06:44:52
12High Performance ECC over NIST Primes on Commercial FPGAs ECC 2008, Utrecht, September 22-24, 2008 Tim Güneysu Horst Görtz Institute for IT-Security Ruhr University of Bochum, Germany

High Performance ECC over NIST Primes on Commercial FPGAs ECC 2008, Utrecht, September 22-24, 2008 Tim Güneysu Horst Görtz Institute for IT-Security Ruhr University of Bochum, Germany

Add to Reading List

Source URL: www.hyperelliptic.org

Language: English - Date: 2008-10-27 20:01:32
13XPERTS CORNER  Improving DDR SDRAM Efficiency with a Reordering Controller Virtex-6 memory controller achieves excellent sustained transfer rates for real-world workloads.

XPERTS CORNER Improving DDR SDRAM Efficiency with a Reordering Controller Virtex-6 memory controller achieves excellent sustained transfer rates for real-world workloads.

Add to Reading List

Source URL: www.xilinx.com

Language: English - Date: 2011-02-15 17:23:45
    14ModelCh. 200 MHz A/D, 4-Ch. 800 MHz D/A, Virtex-7 FPGA - 6U VPX General Information  Features

    ModelCh. 200 MHz A/D, 4-Ch. 800 MHz D/A, Virtex-7 FPGA - 6U VPX General Information Features

    Add to Reading List

    Source URL: altistechnology.com

    Language: English - Date: 2013-05-06 10:19:04
      151  Single Core Implementation of Blue Midnight Wish Hash Function on VIRTEX 5 Platform Mohamed El Hadedy1,2 , Danilo Gligoroski3 and Svein J. Knapskog

      1 Single Core Implementation of Blue Midnight Wish Hash Function on VIRTEX 5 Platform Mohamed El Hadedy1,2 , Danilo Gligoroski3 and Svein J. Knapskog

      Add to Reading List

      Source URL: people.item.ntnu.no

      Language: English - Date: 2010-11-02 08:23:10
        16Product Obsolete/Under Obsolescence Application Note: Virtex-II Series R XAPP623 (v2.1) February 28, 2005

        Product Obsolete/Under Obsolescence Application Note: Virtex-II Series R XAPP623 (v2.1) February 28, 2005

        Add to Reading List

        Source URL: www.xilinx.com

        Language: English - Date: 2013-03-04 06:00:45
        17Implementing Skein Hash Function on Xilinx Virtex-5 FPGA Platform Men Long, Intel Corporation, 02-Feb-09, VersionIntroduction

        Implementing Skein Hash Function on Xilinx Virtex-5 FPGA Platform Men Long, Intel Corporation, 02-Feb-09, VersionIntroduction

        Add to Reading List

        Source URL: www.schneier.com

        Language: English - Date: 2014-03-02 23:18:32
        18DSPBrik™II Virtex®-7 FPGA Module X7F1000 The X7F1000 DSPBrik™II is a Xilinx Virtex®-7 based FPGA with a

        DSPBrik™II Virtex®-7 FPGA Module X7F1000 The X7F1000 DSPBrik™II is a Xilinx Virtex®-7 based FPGA with a

        Add to Reading List

        Source URL: www.rincon.com

        Language: English - Date: 2014-10-23 10:47:24
        19Integrated Processing Platform ̶ V5 IPPV5 The IPPV5 is a Xilinx Virtex-5 based FPGA

        Integrated Processing Platform ̶ V5 IPPV5 The IPPV5 is a Xilinx Virtex-5 based FPGA

        Add to Reading List

        Source URL: www.rincon.com

        Language: English - Date: 2014-10-23 10:43:08
        20Xilinx Virtex-6 and Spartan-6 FPGA Families Peter Alfke, Xilinx, Inc Hot Chips 21, August 2009

        Xilinx Virtex-6 and Spartan-6 FPGA Families Peter Alfke, Xilinx, Inc Hot Chips 21, August 2009

        Add to Reading List

        Source URL: www.hotchips.org

        Language: English - Date: 2013-07-28 00:12:29