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Applied mathematics / Computer science / Model checking / Formal verification / Finite-state machine / Deterministic finite automaton / Automated planning and scheduling / Uppaal Model Checker / Clock / Models of computation / Automata theory / Theoretical computer science


Software Tools for Technology Transfer manuscript No. (will be inserted by the editor) A Loop Acceleration Technique to Speed Up Verification of Automatically-Generated Plans Robert P. Goldman and Michael J.S. Pelican an
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Document Date: 2013-06-12 10:51:30

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File Size: 721,70 KB

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City

Minneapolis / /

Company

CIRCA Background CIRCA / David J. Musliner SIFT LLC / Simple Temporal Networks / Timed Automata / /

Event

Reorganization / /

IndustryTerm

controller synthesis algorithm / on-line resource management / classical planning systems / search states / forward search / control systems / breadth-first search / computing / search stack / graph search algorithms / exhaustive search / search algorithm / real-time systems / /

OperatingSystem

Kronos / /

Organization

Adaptive Mission / Inertial Reference Unit / /

Person

Michael J.S. Pelican / Robert P. Goldman / Ben Salah / /

Position

editor / guard / unsafe controller / Planner / INIT Guard / controller / /

Technology

controller synthesis algorithm Algorithm / artificial intelligence / search algorithm / CSM algorithm / graph search algorithms / DBMs / /

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