Synopsys

Results: 724



#Item
201

新年のご挨拶 2015 新年のご挨拶 後の経済運営を問う衆議院総選挙を経て、新たな成長戦略に挑む 2015 年に突入しました。個人消費の行方

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Source URL: www.synopsys.com

Language: Japanese - Date: 2015-05-01 12:15:51
    202

    Technology Update 「シフトレフト」で検証期間を短縮し、製品の早期市場投入へ シノプシス ベリフィケーション・グループ

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    Source URL: www.synopsys.com

    Language: Japanese - Date: 2015-05-01 12:15:50
      203

      Technology Update 新年のご挨拶 最新技術情報 プロトタイプ作成の迅速化を支援する ProtoCompiler

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      Source URL: www.synopsys.com

      Language: Japanese - Date: 2015-05-01 12:15:50
        204X86 architecture / X86-64 / SUSE Linux Enterprise Server / Solaris / Linux / 64-bit / Novell Open Enterprise Server / Comparison of platform virtual machines / Software / Computing / Computer architecture

        Synopsys Common Licensing Release Notes Version 11.8

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        Source URL: www.synopsys.com

        Language: English - Date: 2015-02-25 17:15:42
        205Hardware description languages / Systems engineering / Logic design / Integrated circuits / Synopsys / Reliability engineering / SPICE / VHDL / Creo Elements/Pro / Electronic engineering / Software / Design

        Datasheet Saber Automotive Overview Overview Energy demand in modern

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        Source URL: www.synopsys.com

        Language: English - Date: 2015-03-20 09:15:48
        206Job scheduling / Job queue / Job scheduler

        Technical Backgrounder ARO: Adaptive Resource Optimizer For Optimal Compute Farm Utilization Introduction

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        Source URL: www.synopsys.com

        Language: English - Date: 2015-02-26 20:45:22
        207Hillsboro /  Oregon / Synopsys / Whois / Internet / Email / Computing

        Synopsys products are available under two versions: 1) University-Academic License or 2) University-External Interactions/Research License.  To help us determine which category you fall under, please complete the Prelim

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        Source URL: www.synopsys.com

        Language: English - Date: 2014-11-07 11:36:50
        208SGI Origin / Integrated circuit design / Logic simulation / Standard cell / Verilog / Physical design / High-level synthesis / Synopsys / R10000 / Electronic engineering / Digital electronics / Electronic design automation

        Origin System Design Methodology and Experience: 1M-gate ASICs and Beyond Ásgeir Th. Eiríksson, John Keen, Alex Silbey, Swami Venkataraman, Michael Woodacre Silicon Graphics Inc., Mountain View, CA Abstract.

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        Source URL: vintagecomputers.info

        Language: English - Date: 1999-02-05 11:20:10
        209Hillsboro /  Oregon / Synopsys

        Synopsys cvd License Verification Checklist This document summarizes the license file verification methodology for Synopsys licenses in the combined vendor daemon (cvd) format used by Synopsys Common Licensing. This docu

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        Source URL: www.synopsys.com

        Language: English - Date: 2015-02-25 17:15:42
        210SGI Origin / Integrated circuit design / Logic simulation / Standard cell / Verilog / Physical design / High-level synthesis / Synopsys / R10000 / Electronic engineering / Digital electronics / Electronic design automation

        Origin System Design Methodology and Experience: 1M-gate ASICs and Beyond Ásgeir Th. Eiríksson, John Keen, Alex Silbey, Swami Venkataraman, Michael Woodacre Silicon Graphics Inc., Mountain View, CA Abstract.

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        Source URL: www.sgidepot.co.uk

        Language: English - Date: 2008-04-15 16:23:14
        UPDATE