Back to Results
First PageMeta Content
Standard cell / Signoff / SPICE / Verilog / Electronic circuit simulation / Synopsys / Signal integrity / Simucad / Electronic engineering / Electronic design automation / Digital electronics


Datasheet SiliconSmart Comprehensive Cell, I/O and Memory Characterization Overview
Add to Reading List

Document Date: 2014-11-07 14:32:38


Open Document

File Size: 325,43 KB

Share Result on Facebook

Company

Red Hat / Synopsys Inc. / Load Sharing Systems / /

Country

United States / /

Facility

port Embedded Memory Recharacterization / Library Validation / /

IndustryTerm

process technologies / digital implementation tools / technology nodes / signoff tools / constraint acceleration technology / simulation technology / recharacterization applications / performance applications / mobile timing analysis solution / characterization solution / load networks / /

OperatingSystem

Red Hat Linux / SUSE Linux / /

Position

driver / Active driver / emulated driver / adaptive parallel job manager / /

Product

Linux / /

ProgrammingLanguage

Tcl / Verilog / /

Technology

semiconductor / built-in FineSim Pro simulation technology / 16-/14-nm process technologies / Verilog / Linux / process technologies / caching / built-in FineSimâ„¢ simulation technology / simulation / SRAM / VHDL / AOCV POCV yy Automatic constraint acceleration technology / /

URL

www.synopsys.com / http /

SocialTag