Silvaco

Results: 128



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1Application Note  Creating Netlists for Harmony Mixed-Signal Simulations Introduction

Application Note Creating Netlists for Harmony Mixed-Signal Simulations Introduction

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Source URL: www.silvaco.com

Language: English - Date: 2015-06-02 20:30:25
    2InVar Reliability Analysis Overview Silvaco delivers a suite of tools devised for accurate and effective analysis of designs ranging from block level to chip level. The patented concurrent methodologies provide users the

    InVar Reliability Analysis Overview Silvaco delivers a suite of tools devised for accurate and effective analysis of designs ranging from block level to chip level. The patented concurrent methodologies provide users the

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    Source URL: www.silvaco.com

    Language: English - Date: 2015-06-23 19:57:47
      3Application Note  HiSIM_HV Single Geometry Parameter Extraction with Automated UTMOST-IV Optimization Introduction

      Application Note HiSIM_HV Single Geometry Parameter Extraction with Automated UTMOST-IV Optimization Introduction

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      Source URL: www.silvaco.com

      Language: English - Date: 2015-06-02 20:30:25
        4Application Note  Physical 3D Single Event Upset Simulation of a SRAM Cell with VICTORY and SmartSpice SEE Introduction

        Application Note Physical 3D Single Event Upset Simulation of a SRAM Cell with VICTORY and SmartSpice SEE Introduction

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        Source URL: www.silvaco.com

        Language: English - Date: 2015-06-02 20:30:26
          5Application Note  SmartSpice Circuit Design Using Local and Global Optimization Introduction The SmartSpice optimizer capability performs variable

          Application Note SmartSpice Circuit Design Using Local and Global Optimization Introduction The SmartSpice optimizer capability performs variable

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          Source URL: www.silvaco.com

          Language: English - Date: 2015-06-02 20:30:25
            6Application Note  SmartSpice: Built-in Interconnect RC Network Reduction Since versionR, SmartSpice has Included a built-in interconnect RC network reduction capability. To enable

            Application Note SmartSpice: Built-in Interconnect RC Network Reduction Since versionR, SmartSpice has Included a built-in interconnect RC network reduction capability. To enable

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            Source URL: www.silvaco.com

            Language: English - Date: 2015-06-02 20:30:25
              7Application Note  High Accuracy Capacitance Extraction of the Delta Type PIXEL Using CLEVER Introduction

              Application Note High Accuracy Capacitance Extraction of the Delta Type PIXEL Using CLEVER Introduction

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              Source URL: www.silvaco.com

              Language: English - Date: 2015-06-02 20:30:24
                8Application Note  SmartSpice SEU Module Introduction Information in electronic circuits is stored and communicated as a collection of electric charges. Any event which upsets the stored or communicated charge can cause

                Application Note SmartSpice SEU Module Introduction Information in electronic circuits is stored and communicated as a collection of electric charges. Any event which upsets the stored or communicated charge can cause

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                Source URL: www.silvaco.com

                Language: English - Date: 2015-06-02 20:30:26
                  9Application Note  EXPERT: Calibre RVE Interface for DRC/LVS Introduction EXPERT can be used in conjunction with Calibre DRC

                  Application Note EXPERT: Calibre RVE Interface for DRC/LVS Introduction EXPERT can be used in conjunction with Calibre DRC

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                  Source URL: www.silvaco.com

                  Language: English - Date: 2015-06-02 20:30:25
                    10Clever RC Extractor for Realistic 3D Structures Clever is a physics-based RC extractor that uses GDSII mask data and process information to create a realistic 3D structure for MEMS, advanced CMOS, TFT, Memory cells, etc.

                    Clever RC Extractor for Realistic 3D Structures Clever is a physics-based RC extractor that uses GDSII mask data and process information to create a realistic 3D structure for MEMS, advanced CMOS, TFT, Memory cells, etc.

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                    Source URL: www.silvaco.com

                    Language: English - Date: 2015-06-02 20:28:56