| Document Date: 2014-11-07 14:32:47
Open Document File Size: 663,13 KBShare Result on Facebook
Company SynopsysInc. / PLX technology / NS/Texas Instruments Inc. / / Country United States / / IndustryTerm metal sheet resistance / process technologies / system-on-chip / simulation tools / hierarchical extraction technology / extraction solution / selective device / isomorphic hierarchical back-annotation technology / parasitic extraction tool / in-context device / flat extraction technology accounts / process technology / memory design applications / reduction algorithms / metal-to-diffusion contact resistance / feature to selectively choose device / parasitic extraction solution / simulation solution / process technology demands / technology scaling / parasitic extraction tools / flat extraction technology / sub-wavelength manufacturing processes / verification tools / technology progression / extraction tools / simulation solutions / metal layers / maximum annotation / / Person Omar Shah / / Position designer / Executive / / Product CustomSim / StarRC parasitic extraction tool / StarRC parasitic extraction solution / StarRC / Synopsys CustomSim / / Technology reduction algorithms / 40-nm process technology / flat extraction technology / system-on-chip / isomorphic hierarchical back-annotation technology / process technologies / SRAM / Simulation / hierarchical extraction technology / process technology / integrated circuits / Nanometer technology / / URL www.synopsys.com / http /
SocialTag |
White Paper Extraction Techniques for High-performance, High-capacity Simulation September 2009