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 Date: 2009-09-23 20:55:33Central processing unit SPARC64 VI Parallel computing Instruction set architectures SPARC64 V SPARC64 Fujitsu SPARC SIMD Computer hardware Computer architecture Computing |
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| SPARC64™ XIfx: Fujitsu’s Next Generation Processor for HPC August 11, 2014 Toshio YoshidaDocID: 10h5A - View Document |
| SWICH: A PROTOTYPE FOR EFFICIENT CACHE-LEVEL CHECKPOINTING AND ROLLBACK EXISTING CACHE-LEVEL CHECKPOINTING SCHEMES DO NOT CONTINUOUSLY SUPPORT A LARGE ROLLBACK WINDOW. IMMEDIATELY AFTER A CHECKPOINT, THE NUMBER OF INSTRUDocID: ZPJh - View Document |