| Document Date: 2010-04-19 14:13:23
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City Dortmund / / Company GPU / / Country Germany / United States / / / Facility Stanford University / GNU Multiple Precision Arithmetic Library / / IndustryTerm parallel co-processor / scientific applications / m-bit products / low and high order products / scientific co-processors / reconfigurable hardware / slower general purpose processor / parallel low precision co-processor / processor technology / residual systems / multi-core processors / accumulated inner products / sparse linear equation systems / purpose processor / parallel co-processors / graphics processor / parallel devices / computer technology / arithmetic processing elements / low-order product / application specific chips / iterative refinement algorithm / linear systems / co-processor / particular algorithm / mixed precision algorithms / mixed products / / OperatingSystem GNU / / Organization Max Planck Center / Stanford University / Paper / Floating Point Unit / / Person STEFAN TUREK / DOMINIK GODDEKE / ROBERT STRZODKA / / Position guard / Corresponding author / / ProvinceOrState California / / SportsLeague Stanford University / / Technology scientific co-processors / FPGA / mixed precision algorithms / parallel co-processors / particular algorithm / Floating Point Unit / graphics processor / iterative refinement algorithm / application specific chips / processor technology / existing parallel co-processors / parallel co-processor / discussed algorithms / purpose processor / parallel low precision co-processor / same algorithm / computer technology / Hardwired processors / same chip / /
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International Journal of Parallel, Emergent and Distributed Systems Vol. 22, No. 4, January 2007, 221–256 Performance and accuracy of hardware-oriented native-, emulated- and mixed-precision solvers in FEM simulations