| Document Date: 2015-03-17 13:57:43
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Company iCE40 LP / I/O I/O Bank / PLB PLB PLB I/O Bank / Architecture iCE40 LP / Pull-up Enable OUTCLK I/O Bank / Programmable Interconnect PLB I/O Bank / Programmable Interconnect PLL NVCM SPI Bank / I/O Bank / Lattice Semiconductor Corp. / Introduction iCE40 LP / IN IN INCLK SPI Bank GBIN / PLL NVCM SPI Bank I/O / I/O Cell VCCIO I/O Bank / Programmable Logic Block I/O Bank / Programmable I/O Cell VCCIO I/O / / Facility PLLOUTLGOBAL port / / IndustryTerm design tools / clock network / bank / synthesis tool / on-chip / logic synthesis tools / / OperatingSystem PIOs / / Person Max Inputs / / Technology FPGA / RAM / SRAM / Flash / / URL www.latticesemi.com/legal / www.latticesemi.com / /
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iCE40™ LP/HX Family Data Sheet DS1040 Version 3.1, March 2015 iCE40 LP/HX Family Data Sheet Introduction February 2014