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Fabless semiconductor companies / Hardware description languages / Logic design / Aldec / Field-programmable gate array / Xilinx / High-level synthesis / Altera / SystemC / Electronic engineering / Digital electronics / Electronic design automation


CyberWorkBench® High-Level Synthesis and Verification by: SystemC High-Level Synthesis and Verification
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Document Date: 2013-08-07 16:44:00

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File Size: 347,60 KB

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