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Computer programming / Message Passing Interface / SPMD / OpenMP / Earth Simulator / MIMD / Thread / Task parallelism / Domain decomposition methods / Computing / Concurrent computing / Parallel computing


Document Date: 2006-05-18 19:34:53

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City

Multistage Networks Bus / Center / Boston / Dynamic Interconnects Bus / Reading / /

Company

IBM / Fujitsu / Quadrics Lawrence Livermore 7634 National Laboratory / John Wiley and Sons Inc. / NEC / SP Livermore 7304 Power3 375 MHz National Laboratory / National Aerospace 5406 Laboratory / Los Alamos 13880 National Laboratory / McGraw-Hill / Quadrics Lawrence Livermore 6586 National Laboratory / USA 4881 National Laboratory / Multistage Interconnection Networks / Intel / Amdahl / /

Country

France / Japan / United States / /

Facility

Environmental Engineering University of California Santa Barbara / Dynamic Interconnects Bus-based Cross bar Multistage / Laboratory of Japan Japan / Building Parallel Programs / /

IndustryTerm

inter-connection networks / parallel algorithms / educational tool / 3D torus network / elimination algorithm / computation load such that all processors / signal processing / software package / bus-based interconnection network / large systems / interconnection network / nonboundary processor / user applications / mesh network / homogeneous parallel systems / connected network / larger systems / /

OperatingSystem

Unix / Linux / /

Organization

Supercomputing Center / WCB / Mechanical and Environmental Engineering University of California Santa Barbara / /

Person

Reduction / Stefan Boeriu / K. P. Wang / John C. Bruch Jr. / J. C. Bruch / Jr. / Kai-Ping Wang / /

Position

General / Tackle / Forward / programmer / /

Product

T-90 / Linux / Power3 375 MHz 16 / /

ProgrammingLanguage

C / Fortran 90 / Fortran / C++ / /

Region

Northwest USA / /

Technology

Some processors / Alpha / Virtual machine / Gaussian elimination algorithm / Each processor / Av / 1.1 Parallel SOR Iterative Algorithms / Linux / Unix / Two processors / nonboundary processor / Shared Memory / Office of Information Technology / one processor / 4 processors / Load Balancing / Environmental Engineering / All processors / 1.2 Parallel SOR Iterative Algorithms / Gigabit Ethernet / /

URL

www.top500.org / www.netlib.org / /

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