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Application programming interfaces / Computer architecture / Message Passing Interface / Graphics hardware / Multi-core processor / Coprocessor / Embedded system / Computer cluster / Hardware acceleration / Computing / Parallel computing / Central processing unit


Programming the Nallatech Xeon + Multi-FPGA Platform
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Document Date: 2013-07-28 00:11:23

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File Size: 406,52 KB

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Company

Network Infrastructure Software / Finalize() Hot Chips 2009 Hardware / /

Facility

MPI library / Chris Madill University of Toronto ArchES Computing Systems Copyright / /

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interface protocols / distributed-memory systems / parallel applications / software prototype / control protocols / software portability / software version / software tasks / portable hardware / /

Organization

Chris Madill University of Toronto ArchES Computing Systems Copyright / /

Person

Arun Patel / Manuel Saldaña / /

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Position

hardware designer / Representative / Application Specialist / /

Technology

FPGA / MPI protocols / Embedded processors / 2009 Hardware Accelerator Hot Chips / 2009 T4 Tn T2 Hot Chips / 2009 Hot Chips / interface protocols / control protocols / /

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