Multiprocessor

Results: 163



#Item
1POLYMORPHIC CHIP MULTIPROCESSOR ARCHITECTURE A DISSERTATION SUBMITTED TO THE DEPARTMENT OF ELECTRICAL ENGINEERING AND THE COMMITTEE ON GRADUATE STUDIES OF STANFORD UNIVERSITY

POLYMORPHIC CHIP MULTIPROCESSOR ARCHITECTURE A DISSERTATION SUBMITTED TO THE DEPARTMENT OF ELECTRICAL ENGINEERING AND THE COMMITTEE ON GRADUATE STUDIES OF STANFORD UNIVERSITY

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Source URL: www-vlsi.stanford.edu

Language: English - Date: 2009-05-29 13:25:48
    2Fixed-Priority Multiprocessor Scheduling: Beyond Liu & Layland Utilization Bound Nan Guan1 , Martin Stigge1 , Wang Yi1 and Ge Yu2 1 Uppsala University, Sweden 2 Northeastern University, China

    Fixed-Priority Multiprocessor Scheduling: Beyond Liu & Layland Utilization Bound Nan Guan1 , Martin Stigge1 , Wang Yi1 and Ge Yu2 1 Uppsala University, Sweden 2 Northeastern University, China

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    Source URL: user.it.uu.se

    Language: English - Date: 2010-12-16 07:38:23
      3ISSCCSESSION 14 / MICROPROCESSORS / PAPERA 600MHz Single-Chip Multiprocessor with 4.8GB/s Internal Shared Pipelined Bus and

      ISSCCSESSION 14 / MICROPROCESSORS / PAPERA 600MHz Single-Chip Multiprocessor with 4.8GB/s Internal Shared Pipelined Bus and

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      Source URL: www.linux-m32r.org

      Language: English - Date: 2014-05-14 23:57:39
        4Towards the Optimal Solution of the Multiprocessor Scheduling Problem with Communication Delays Tatjana Davidovi´c Mathematical Institute, Serbian Academy of Sciences, Belgrade, Serbia, Leo Liberti

        Towards the Optimal Solution of the Multiprocessor Scheduling Problem with Communication Delays Tatjana Davidovi´c Mathematical Institute, Serbian Academy of Sciences, Belgrade, Serbia, Leo Liberti

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        Source URL: www.enseignement.polytechnique.fr

        Language: English - Date: 2007-05-02 16:41:46
          5Fixed-Priority Multiprocessor Scheduling with Liu & Layland’s Utilization Bound Nan Guan†‡ , Martin Stigge† , Wang Yi†‡ and Ge Yu‡ † Department ‡ Department of Information Technology, Uppsala Universit

          Fixed-Priority Multiprocessor Scheduling with Liu & Layland’s Utilization Bound Nan Guan†‡ , Martin Stigge† , Wang Yi†‡ and Ge Yu‡ † Department ‡ Department of Information Technology, Uppsala Universit

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          Source URL: user.it.uu.se

          Language: English - Date: 2010-05-06 03:43:03
            619th International Symposium on Computer Architecture and High Performance Computing Impacts of Multiprocessor Configurations on Workloads in Bioinformatics Youfeng Wu, Mauricio Breternitz Jr, Victor Ying Programming Sy

            19th International Symposium on Computer Architecture and High Performance Computing Impacts of Multiprocessor Configurations on Workloads in Bioinformatics Youfeng Wu, Mauricio Breternitz Jr, Victor Ying Programming Sy

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            Source URL: www.bioperf.org

            Language: English - Date: 2008-05-05 11:36:18
              7Two Protocols to Reduce the Criticality Level of Multiprocessor MixedCriticality Systems François Santy Gurulingesh Raravi

              Two Protocols to Reduce the Criticality Level of Multiprocessor MixedCriticality Systems François Santy Gurulingesh Raravi

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              Source URL: leat.unice.fr

              Language: English - Date: 2013-11-08 01:30:39
                8Partitioned Mixed-Criticality Scheduling on Multiprocessor Platforms

                Partitioned Mixed-Criticality Scheduling on Multiprocessor Platforms

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                Source URL: user.it.uu.se

                Language: English - Date: 2015-04-24 08:53:47
                  9Optimizing Preemption-Overhead Accounting in Multiprocessor Real-Time Systems ∗ Bryan C. Ward Abhilash Thekkilakattil

                  Optimizing Preemption-Overhead Accounting in Multiprocessor Real-Time Systems ∗ Bryan C. Ward Abhilash Thekkilakattil

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                  Source URL: www.cs.unc.edu

                  - Date: 2014-09-10 18:30:03
                    10Simulation-Based Evaluations of DAG Scheduling in Hard Real-time Multiprocessor Systems Manar Qamhieh, Serge Midonnet To cite this version: Manar Qamhieh, Serge Midonnet. Simulation-Based Evaluations of DAG Scheduling in

                    Simulation-Based Evaluations of DAG Scheduling in Hard Real-time Multiprocessor Systems Manar Qamhieh, Serge Midonnet To cite this version: Manar Qamhieh, Serge Midonnet. Simulation-Based Evaluations of DAG Scheduling in

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                    Source URL: hal.archives-ouvertes.fr

                    - Date: 2016-12-20 07:55:49