| Document Date: 2011-11-23 11:13:29
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Company IBM Zurich Research Laboratory / F. Pellizzer S. A. / Melexis Technologies SA / EPCOS / Solid-State Electronics / / Country Switzerland / Jordan / Greece / / / Facility IBM Zurich Research Laboratory / IBM T.J. Watson Research Center / University of Patras / / IndustryTerm chalcogenide-based memory devices / memory technologies / proposed iterative programming algorithms / off-chip / drift power law model / memory chip / read and write algorithms / iterative programming algorithms / iterative algorithm / multi-level current-control algorithm / overall energy consumption / storage system technology / memory-type applications / memory technology / enterprise-storage applications / low energy dissipation / high-volume manufacturing / drift power-law model / access device / resistance-drift power-law model / on-chip / activation energy / memory devices / prototype chip / technological solutions / / Organization University of Patras / US Federal Reserve / / Person Th / / Position driver / iterative fixpoint PID controller / controller / / ProgrammingLanguage L / / PublishedMedium Journal of Applied Physics / / Technology 256 Mcell MLC PCM chip / FPGA / Enabling Technologies / memory technology / memory technologies / PCM technology / ADC / av / iterative programming algorithms / memory chip / prototype chip / 3-D / programming algorithm / prototype PCM chip / crystallization / storage system technology / lithography / iterative algorithm / caching / 256 Mcells chip / MLC PCM chip / proposed iterative programming algorithms / Flash / PCM chip / PCM prototype chip / PCM chips / been accomplished using the MLC PCM chip / /
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Enabling Technologies for Multilevel Phase-Change Memory H. Pozidis, N. Papandreou, A. Sebastian, A. Pantazi, T. Mittelholzer, G. F. Close and E. Eleftheriou IBM Research – Zurich, CH-8803 Ruschlikon, Switzerland, emai