Interrupt

Results: 762



#Item
11Soft Timers: Efficient Microsecond Software Timer Support for Network Processing MOHIT ARON and PETER DRUSCHEL Rice University

Soft Timers: Efficient Microsecond Software Timer Support for Network Processing MOHIT ARON and PETER DRUSCHEL Rice University

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Source URL: www.cs.rice.edu

Language: English - Date: 2000-12-17 03:42:42
12PCI BIOS SPECIFICATION Revision 2.1 August 26, 1994 ii

PCI BIOS SPECIFICATION Revision 2.1 August 26, 1994 ii

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Source URL: www.o3one.org

Language: English - Date: 2000-02-14 12:42:24
13Hypervisor-based  Fault-tolerance Thomas C. Bressoud Isis Distributed Systems

Hypervisor-based Fault-tolerance Thomas C. Bressoud Isis Distributed Systems

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Source URL: nil.csail.mit.edu

Language: English - Date: 2015-01-05 06:37:33
14Poster Abstract: Predictable Wireless Embedded Platforms Felix Sutton, Reto Da Forno, Marco Zimmerling, Roman Lim, Tonio Gsell, Federico Ferrari, Jan Beutel, and Lothar Thiele Computer Engineering and Networks Laboratory

Poster Abstract: Predictable Wireless Embedded Platforms Felix Sutton, Reto Da Forno, Marco Zimmerling, Roman Lim, Tonio Gsell, Federico Ferrari, Jan Beutel, and Lothar Thiele Computer Engineering and Networks Laboratory

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Source URL: www.tik.ee.ethz.ch

Language: English - Date: 2015-05-18 12:16:21
15Advanced Parallel Architecture Lesson 4 Annalisa Massini Modules and connections

Advanced Parallel Architecture Lesson 4 Annalisa Massini Modules and connections

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Source URL: twiki.di.uniroma1.it

Language: English - Date: 2015-03-11 05:20:43
16University of Minnesota - Class Schedule for Twin Cities Campus ACADEMIC HEALTH CENTER SHARED (AHSMoos Tower, 515 Delaware Street SE (MMC 502), East Bank Campus, Minneapolis, MN, 55455

University of Minnesota - Class Schedule for Twin Cities Campus ACADEMIC HEALTH CENTER SHARED (AHSMoos Tower, 515 Delaware Street SE (MMC 502), East Bank Campus, Minneapolis, MN, 55455

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Source URL: www.onestop.umn.edu

Language: English - Date: 2015-09-30 14:35:20
17Computer architecture / Computing / IBM PC compatibles / Software / Intel / Programmable interval timer / IBM Personal Computer / Timer / Interrupt / BIOS / System time

Behavior Research Methods, Instruments, & Computers 1990, 22 (3), PROGRAM ABSTRACTS/ALGORITHMS

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Source URL: crr.ugent.be

Language: English - Date: 2011-02-27 04:37:05
18Chapter 8  Exceptional Control Flow From the time you first apply power to a processor until the time you shut it off, the program counter assumes a sequence of values a0 , a1 , . . . , an−1

Chapter 8 Exceptional Control Flow From the time you first apply power to a processor until the time you shut it off, the program counter assumes a sequence of values a0 , a1 , . . . , an−1

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Source URL: csapp.cs.cmu.edu

Language: English - Date: 2010-02-14 14:17:30
19University of Minnesota - Class Schedule for Twin Cities Campus ACADEMIC HEALTH CENTER SHARED (AHSMoos Tower, 515 Delaware Street SE (MMC 502), East Bank Campus, Minneapolis, MN, 55455

University of Minnesota - Class Schedule for Twin Cities Campus ACADEMIC HEALTH CENTER SHARED (AHSMoos Tower, 515 Delaware Street SE (MMC 502), East Bank Campus, Minneapolis, MN, 55455

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Source URL: www.onestop.umn.edu

Language: English - Date: 2014-12-04 16:11:45
20RISC-­‐V	
  Assembly	
  Test	
   Infrastructure	
   Stephen	
  Twigg	
   UC	
  Berkeley	
   !

RISC-­‐V  Assembly  Test   Infrastructure   Stephen  Twigg   UC  Berkeley   !

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Source URL: riscv.org

Language: English - Date: 2016-04-09 11:41:57