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University of Cambridge Computer Laboratory / Advanced Encryption Standard / 64-bit / International Data Encryption Algorithm / Cryptography / Block ciphers / Tiny Encryption Algorithm


Very Compact Hardware Implementations of the Blockcipher CLEFIA Toru Akishita and Harunaga Hiwatari Sony Corporation {Toru.Akishita,Harunaga.Hiwatari}@jp.sony.com
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Document Date: 2011-06-14 23:29:05

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File Size: 674,42 KB

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Company

AES / CBC / CLEFIA / GE / Previous Hardware Implementations Hardware / Harunaga Hiwatari Sony Corporation / /

Currency

pence / /

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Facility

Language Verilog-HDL Design library / /

IndustryTerm

modified decryption processing / data processing block / wireless sensor nodes / encryption processing / data processing part / data processing / decryption processing / embedded devices / /

Organization

ASIC / MUX / US Federal Reserve / /

Product

Vizio L32 Television / /

ProgrammingLanguage

Verilog / /

Technology

encryption / RAM / ASIC / Verilog / secret key / shift-register based architecture supporting encryption / /

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